forked from OSchip/llvm-project
59 lines
2.0 KiB
LLVM
59 lines
2.0 KiB
LLVM
; RUN: opt %loadPolly -tbaa -polly-print-scops -polly-invariant-load-hoisting=true -polly-ignore-aliasing \
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; RUN: -disable-output < %s | FileCheck %s
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;
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; Note: The order of the invariant accesses is important because A is the
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; base pointer of tmp3 and we will generate code in the same order as
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; the invariant accesses are listed here.
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;
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; CHECK: Invariant Accesses: {
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; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK: MemRef_A[42]
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; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK: MemRef_tmp3[32]
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; CHECK: }
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;
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; CHECK: Arrays {
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; CHECK: i32** MemRef_A[*];
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; CHECK: i32* MemRef_tmp3[*]; [BasePtrOrigin: MemRef_A]
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; CHECK: i32 MemRef_tmp5[*]; [BasePtrOrigin: MemRef_tmp3]
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; CHECK: }
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;
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; CHECK: Arrays (Bounds as pw_affs) {
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; CHECK: i32** MemRef_A[*];
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; CHECK: i32* MemRef_tmp3[*]; [BasePtrOrigin: MemRef_A]
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; CHECK: i32 MemRef_tmp5[*]; [BasePtrOrigin: MemRef_tmp3]
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; CHECK: }
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;
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; void f(int ***A) {
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; for (int i = 0; i < 1024; i++)
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; A[42][32][i] = 0;
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; }
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;
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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define void @f(i32*** %A) {
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bb:
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br label %bb1
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bb1: ; preds = %bb7, %bb
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%indvars.iv = phi i64 [ %indvars.iv.next, %bb7 ], [ 0, %bb ]
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%exitcond = icmp ne i64 %indvars.iv, 1024
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br i1 %exitcond, label %bb2, label %bb8
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bb2: ; preds = %bb1
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%tmp = getelementptr inbounds i32**, i32*** %A, i64 42
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%tmp3 = load i32**, i32*** %tmp, align 8
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%tmp4 = getelementptr inbounds i32*, i32** %tmp3, i64 32
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%tmp5 = load i32*, i32** %tmp4, align 8
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%tmp6 = getelementptr inbounds i32, i32* %tmp5, i64 %indvars.iv
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store i32 0, i32* %tmp6, align 4
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br label %bb7
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bb7: ; preds = %bb2
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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br label %bb1
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bb8: ; preds = %bb1
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ret void
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}
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