forked from OSchip/llvm-project
121 lines
4.6 KiB
C
121 lines
4.6 KiB
C
// REQUIRES: aarch64-registered-target
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// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
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// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
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// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t
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// RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t
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// If this check fails please read test/CodeGen/aarch64-sve-intrinsics/README for instructions on how to resolve it.
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// ASM-NOT: warning
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#include <arm_sve.h>
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#ifdef SVE_OVERLOADED_FORMS
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// A simple used,unused... macro, long enough to represent any SVE builtin.
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#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
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#else
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#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
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#endif
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int32_t test_svqinch_n_s32(int32_t op)
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{
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// CHECK-LABEL: test_svqinch_n_s32
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// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqinch.n32(i32 %op, i32 31, i32 1)
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// CHECK: ret i32 %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svqinch,_n_s32,,)(op, 1);
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}
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int32_t test_svqinch_n_s32_1(int32_t op)
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{
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// CHECK-LABEL: test_svqinch_n_s32_1
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// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqinch.n32(i32 %op, i32 31, i32 16)
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// CHECK: ret i32 %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svqinch,_n_s32,,)(op, 16);
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}
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int64_t test_svqinch_n_s64(int64_t op)
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{
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// CHECK-LABEL: test_svqinch_n_s64
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// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqinch.n64(i64 %op, i32 31, i32 1)
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// CHECK: ret i64 %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svqinch,_n_s64,,)(op, 1);
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}
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uint32_t test_svqinch_n_u32(uint32_t op)
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{
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// CHECK-LABEL: test_svqinch_n_u32
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// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqinch.n32(i32 %op, i32 31, i32 16)
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// CHECK: ret i32 %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svqinch,_n_u32,,)(op, 16);
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}
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uint64_t test_svqinch_n_u64(uint64_t op)
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{
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// CHECK-LABEL: test_svqinch_n_u64
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// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqinch.n64(i64 %op, i32 31, i32 1)
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// CHECK: ret i64 %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svqinch,_n_u64,,)(op, 1);
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}
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int32_t test_svqinch_pat_n_s32(int32_t op)
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{
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// CHECK-LABEL: test_svqinch_pat_n_s32
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// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqinch.n32(i32 %op, i32 30, i32 16)
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// CHECK: ret i32 %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svqinch_pat,_n_s32,,)(op, SV_MUL3, 16);
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}
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int64_t test_svqinch_pat_n_s64(int64_t op)
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{
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// CHECK-LABEL: test_svqinch_pat_n_s64
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// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqinch.n64(i64 %op, i32 31, i32 1)
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// CHECK: ret i64 %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svqinch_pat,_n_s64,,)(op, SV_ALL, 1);
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}
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uint32_t test_svqinch_pat_n_u32(uint32_t op)
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{
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// CHECK-LABEL: test_svqinch_pat_n_u32
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// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqinch.n32(i32 %op, i32 0, i32 16)
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// CHECK: ret i32 %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svqinch_pat,_n_u32,,)(op, SV_POW2, 16);
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}
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uint64_t test_svqinch_pat_n_u64(uint64_t op)
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{
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// CHECK-LABEL: test_svqinch_pat_n_u64
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// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqinch.n64(i64 %op, i32 1, i32 1)
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// CHECK: ret i64 %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svqinch_pat,_n_u64,,)(op, SV_VL1, 1);
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}
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svint16_t test_svqinch_s16(svint16_t op)
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{
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// CHECK-LABEL: test_svqinch_s16
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqinch.nxv8i16(<vscale x 8 x i16> %op, i32 31, i32 16)
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// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svqinch,_s16,,)(op, 16);
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}
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svuint16_t test_svqinch_u16(svuint16_t op)
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{
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// CHECK-LABEL: test_svqinch_u16
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqinch.nxv8i16(<vscale x 8 x i16> %op, i32 31, i32 1)
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// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svqinch,_u16,,)(op, 1);
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}
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svint16_t test_svqinch_pat_s16(svint16_t op)
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{
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// CHECK-LABEL: test_svqinch_pat_s16
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqinch.nxv8i16(<vscale x 8 x i16> %op, i32 2, i32 16)
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// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svqinch_pat,_s16,,)(op, SV_VL2, 16);
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}
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svuint16_t test_svqinch_pat_u16(svuint16_t op)
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{
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// CHECK-LABEL: test_svqinch_pat_u16
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// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqinch.nxv8i16(<vscale x 8 x i16> %op, i32 3, i32 1)
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// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
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return SVE_ACLE_FUNC(svqinch_pat,_u16,,)(op, SV_VL3, 1);
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}
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