forked from OSchip/llvm-project
140 lines
3.9 KiB
LLVM
140 lines
3.9 KiB
LLVM
; Test 16-bit atomic NANDs.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
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; Check NAND of a variable.
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; - CHECK is for the main loop.
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; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
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; RLL is set up correctly. The negation is independent of the NILL and L
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; tested in CHECK.
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; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word
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; before being used, and that the low bits are set to 1. This sequence is
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; independent of the other loop prologue instructions.
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define i16 @f1(i16 *%src, i16 %b) {
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; CHECK: f1:
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; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
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; CHECK: nill %r2, 65532
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; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
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; CHECK: [[LABEL:\.[^:]*]]:
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; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
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; CHECK: nr [[ROT]], %r3
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; CHECK: xilf [[ROT]], 4294901760
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; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
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; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
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; CHECK: jlh [[LABEL]]
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; CHECK: rll %r2, [[OLD]], 16([[SHIFT]])
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; CHECK: br %r14
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;
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; CHECK-SHIFT1: f1:
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; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
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; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
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; CHECK-SHIFT1: rll
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; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
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; CHECK-SHIFT1: rll
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; CHECK-SHIFT1: br %r14
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;
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; CHECK-SHIFT2: f1:
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; CHECK-SHIFT2: sll %r3, 16
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; CHECK-SHIFT2: oill %r3, 65535
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; CHECK-SHIFT2: rll
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; CHECK-SHIFT2: nr {{%r[0-9]+}}, %r3
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; CHECK-SHIFT2: rll
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; CHECK-SHIFT2: rll
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; CHECK-SHIFT2: br %r14
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%res = atomicrmw nand i16 *%src, i16 %b seq_cst
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ret i16 %res
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}
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; Check the minimum signed value. We AND the rotated word with 0x8000ffff.
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define i16 @f2(i16 *%src) {
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; CHECK: f2:
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; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
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; CHECK: nill %r2, 65532
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; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
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; CHECK: [[LABEL:\.[^:]*]]:
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; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
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; CHECK: nilh [[ROT]], 32768
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; CHECK: xilf [[ROT]], 4294901760
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; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0([[NEGSHIFT:%r[1-9]+]])
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; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
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; CHECK: jlh [[LABEL]]
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; CHECK: rll %r2, [[OLD]], 16([[SHIFT]])
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; CHECK: br %r14
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;
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; CHECK-SHIFT1: f2:
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; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
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; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
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; CHECK-SHIFT1: rll
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; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
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; CHECK-SHIFT1: rll
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; CHECK-SHIFT1: br %r14
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;
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; CHECK-SHIFT2: f2:
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; CHECK-SHIFT2: br %r14
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%res = atomicrmw nand i16 *%src, i16 -32768 seq_cst
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ret i16 %res
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}
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; Check NANDs of -2 (-1 isn't useful). We AND the rotated word with 0xfffeffff.
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define i16 @f3(i16 *%src) {
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; CHECK: f3:
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; CHECK: nilh [[ROT]], 65534
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; CHECK: xilf [[ROT]], 4294901760
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; CHECK: br %r14
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;
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; CHECK-SHIFT1: f3:
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; CHECK-SHIFT1: br %r14
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; CHECK-SHIFT2: f3:
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; CHECK-SHIFT2: br %r14
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%res = atomicrmw nand i16 *%src, i16 -2 seq_cst
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ret i16 %res
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}
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; Check ANDs of 1. We AND the rotated word with 0x0001ffff.
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define i16 @f4(i16 *%src) {
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; CHECK: f4:
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; CHECK: nilh [[ROT]], 1
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; CHECK: xilf [[ROT]], 4294901760
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; CHECK: br %r14
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;
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; CHECK-SHIFT1: f4:
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; CHECK-SHIFT1: br %r14
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; CHECK-SHIFT2: f4:
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; CHECK-SHIFT2: br %r14
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%res = atomicrmw nand i16 *%src, i16 1 seq_cst
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ret i16 %res
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}
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; Check the maximum signed value. We AND the rotated word with 0x7fffffff.
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define i16 @f5(i16 *%src) {
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; CHECK: f5:
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; CHECK: nilh [[ROT]], 32767
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; CHECK: xilf [[ROT]], 4294901760
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; CHECK: br %r14
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;
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; CHECK-SHIFT1: f5:
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; CHECK-SHIFT1: br %r14
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; CHECK-SHIFT2: f5:
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; CHECK-SHIFT2: br %r14
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%res = atomicrmw nand i16 *%src, i16 32767 seq_cst
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ret i16 %res
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}
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; Check NANDs of a large unsigned value. We AND the rotated word with
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; 0xfffdffff.
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define i16 @f6(i16 *%src) {
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; CHECK: f6:
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; CHECK: nilh [[ROT]], 65533
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; CHECK: xilf [[ROT]], 4294901760
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; CHECK: br %r14
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;
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; CHECK-SHIFT1: f6:
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; CHECK-SHIFT1: br %r14
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; CHECK-SHIFT2: f6:
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; CHECK-SHIFT2: br %r14
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%res = atomicrmw nand i16 *%src, i16 65533 seq_cst
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ret i16 %res
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}
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