forked from OSchip/llvm-project
62 lines
1.4 KiB
LLVM
62 lines
1.4 KiB
LLVM
; Test the "Q" asm constraint, which accepts addresses that have a base
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; and a 12-bit displacement.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; Check the lowest range.
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define void @f1(i64 %base) {
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; CHECK: f1:
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; CHECK: blah 0(%r2)
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; CHECK: br %r14
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%addr = inttoptr i64 %base to i64 *
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call void asm "blah $0", "=*Q" (i64 *%addr)
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ret void
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}
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; Check the next lowest byte.
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define void @f2(i64 %base) {
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; CHECK: f2:
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; CHECK: aghi %r2, -1
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; CHECK: blah 0(%r2)
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; CHECK: br %r14
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%add = add i64 %base, -1
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%addr = inttoptr i64 %add to i64 *
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call void asm "blah $0", "=*Q" (i64 *%addr)
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ret void
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}
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; Check the highest range.
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define void @f3(i64 %base) {
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; CHECK: f3:
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; CHECK: blah 4095(%r2)
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; CHECK: br %r14
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%add = add i64 %base, 4095
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%addr = inttoptr i64 %add to i64 *
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call void asm "blah $0", "=*Q" (i64 *%addr)
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ret void
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}
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; Check the next highest byte.
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define void @f4(i64 %base) {
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; CHECK: f4:
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; CHECK: aghi %r2, 4096
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; CHECK: blah 0(%r2)
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; CHECK: br %r14
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%add = add i64 %base, 4096
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%addr = inttoptr i64 %add to i64 *
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call void asm "blah $0", "=*Q" (i64 *%addr)
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ret void
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}
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; Check that indices aren't allowed
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define void @f5(i64 %base, i64 %index) {
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; CHECK: f5:
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; CHECK: agr %r2, %r3
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; CHECK: blah 0(%r2)
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; CHECK: br %r14
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%add = add i64 %base, %index
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%addr = inttoptr i64 %add to i64 *
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call void asm "blah $0", "=*Q" (i64 *%addr)
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ret void
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}
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