llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-xor3.xf...

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# RUN: not --crash llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERR %s
# ERR: *** Bad machine code: VOP* instruction violates constant bus restriction ***
---
name: xor_s32_sgpr_sgpr_vgpr
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.0:
liveins: $sgpr0, $sgpr1, $vgpr0
%0:sgpr(s32) = COPY $sgpr0
%1:sgpr(s32) = COPY $sgpr1
%2:sgpr(s32) = COPY $vgpr0
%3:sgpr(s32) = G_XOR %0, %1
%4:vgpr(s32) = G_XOR %3, %2
S_ENDPGM 0, implicit %4
...