forked from OSchip/llvm-project
42 lines
1.2 KiB
TableGen
42 lines
1.2 KiB
TableGen
// RUN: llvm-tblgen -gen-asm-matcher -I %p/../../include %s | FileCheck %s
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include "llvm/Target/Target.td"
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def ArchInstrInfo : InstrInfo { }
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def Arch : Target {
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let InstructionSet = ArchInstrInfo;
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}
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def Reg : Register<"reg">;
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def RegClass : RegisterClass<"foo", [i32], 0, (add Reg)>;
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def AsmCond1 : SubtargetFeature<"cond1", "cond1", "true", "">;
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def AsmCond2 : SubtargetFeature<"cond2", "cond2", "true", "">;
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def Subtarget1 : Predicate<"Pred1">, AssemblerPredicate<(all_of AsmCond1)>;
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def Subtarget2 : Predicate<"Pred2">, AssemblerPredicate<(all_of AsmCond2)>;
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multiclass DefInstruction<string name, dag outs, dag ins, Predicate pred> {
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def "" : Instruction {
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let Size = 2;
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let OutOperandList = outs;
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let InOperandList = ins;
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let AsmString = name;
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let Predicates = [pred];
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}
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def : MnemonicAlias<name # "_alias", name>;
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}
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defm FooInst1 : DefInstruction<"foo", (outs), (ins), Subtarget1>;
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defm FooInst2 : DefInstruction<"foo", (outs), (ins), Subtarget2>;
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// Check that applyMnemonicAliases maps "foo_alias" to "foo" once only and
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// without checking any predicates.
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// CHECK: if (memcmp(Mnemonic.data()+0, "foo_alias", 9) != 0)
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// CHECK-NEXT: break;
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// CHECK-NEXT: Mnemonic = "foo"; // "foo_alias"
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// CHECK-NEXT: return;
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