llvm-project/llvm/lib/CodeGen/SelectionDAG
Eli Friedman 0b3b0a727a [AArch64][RISCV] Make sure isel correctly honors failure orderings.
If a cmpxchg specifies acquire or seq_cst on failure, make sure we
generate code consistent with that ordering even if the success ordering
is not acquire/seq_cst.

At one point, it was ambiguous whether this sort of construct was valid,
but the C++ standad and LLVM now accept arbitrary combinations of
success/failure orderings.

This doesn't address the corresponding issue in AtomicExpand. (This was
reported as https://bugs.llvm.org/show_bug.cgi?id=33332 .)

Fixes https://bugs.llvm.org/show_bug.cgi?id=50512.

Differential Revision: https://reviews.llvm.org/D103284
2021-05-28 12:47:40 -07:00
..
CMakeLists.txt llvmbuildectomy - replace llvm-build by plain cmake 2020-11-13 10:35:24 +01:00
DAGCombiner.cpp [DAGCombine][RISCV] Don't try to trunc-store combined vector stores 2021-05-27 14:16:32 +01:00
FastISel.cpp [DebugInfo] Handle DIArgList in FastISel or GlobalIsel 2021-05-20 17:37:28 +01:00
FunctionLoweringInfo.cpp [NFC] Wisely nest dyn_cast in FunctionLoweringInfo 2021-03-16 10:22:44 +01:00
InstrEmitter.cpp [SystemZ] Support i128 inline asm operands. 2021-05-26 10:08:32 -05:00
InstrEmitter.h [DebugInfo] Emit DBG_VALUE_LIST from ISel 2021-03-09 12:17:39 +00:00
LegalizeDAG.cpp [AArch64][RISCV] Make sure isel correctly honors failure orderings. 2021-05-28 12:47:40 -07:00
LegalizeFloatTypes.cpp Revert "[CodeGen][ARM] Implement atomicrmw as pseudo operations at -O0" 2021-05-03 21:48:20 +01:00
LegalizeIntegerTypes.cpp [AArch64][RISCV] Make sure isel correctly honors failure orderings. 2021-05-28 12:47:40 -07:00
LegalizeTypes.cpp [SelectionDAG] Use range-based for loops (NFC) 2021-02-09 22:14:30 -08:00
LegalizeTypes.h [CodeGen] Add support for widening INSERT_SUBVECTOR operands 2021-05-20 10:37:03 +01:00
LegalizeTypesGeneric.cpp [CodeGen] Refactor getMemBasePlusOffset & getObjectPtrOffset to accept a TypeSize 2020-08-11 12:17:10 +01:00
LegalizeVectorOps.cpp [SelectionDAG][RISCV] Don't unroll 0/1-type bool VSELECTs 2021-05-27 10:08:57 +01:00
LegalizeVectorTypes.cpp [CodeGen] Add support for widening the result of EXTRACT_SUBVECTOR 2021-05-20 12:27:08 +01:00
ResourcePriorityQueue.cpp
SDNodeDbgValue.h [DAG] Ensure all SD classes consistently return a const reference with getDebugLoc(). NFCI. 2021-05-07 14:48:23 +01:00
ScheduleDAGFast.cpp [DebugInstrRef] Create DBG_INSTR_REFs in SelectionDAG 2020-10-14 14:24:08 +01:00
ScheduleDAGRRList.cpp Revert "[NFC][ScheduleDAG] Remove unused EntrySU SUnit" 2020-09-21 13:33:05 +02:00
ScheduleDAGSDNodes.cpp [DebugInfo] Fix crash when emitting an invalidated SDDbgValue 2021-05-07 13:13:56 +01:00
ScheduleDAGSDNodes.h
ScheduleDAGVLIW.cpp [SelectionDAG] Use range-based for loops (NFC) 2021-02-09 22:14:30 -08:00
SelectionDAG.cpp [SelectionDAG] Fix typo in assert. NFC 2021-05-28 10:37:11 -07:00
SelectionDAGAddressAnalysis.cpp [SelectionDAG] Avoid aliasing analysis if the object size is unknown. 2020-11-25 06:13:37 +08:00
SelectionDAGBuilder.cpp [VP] Make getMaskParamPos/getVectorLengthParamPos return unsigned. Lowercase function names. 2021-05-28 11:28:47 -07:00
SelectionDAGBuilder.h SwiftTailCC: teach verifier musttail rules applicable to this CC. 2021-05-28 11:12:00 +01:00
SelectionDAGDumper.cpp [IR][SVE] Add new llvm.experimental.stepvector intrinsic 2021-03-23 10:43:35 +00:00
SelectionDAGISel.cpp [SelectionDAG] Make fast and linearize visible by clang -pre-RA-sched 2021-05-17 11:25:15 +08:00
SelectionDAGPrinter.cpp [SelectionDAG] Drop unnecessary const from a return type (NFC) 2021-02-07 09:49:33 -08:00
SelectionDAGTargetInfo.cpp
StatepointLowering.cpp [Statepoint Lowering] Cleanup: remove unused option statepoint-always-spill-base. 2021-05-18 12:15:15 +07:00
StatepointLowering.h More precisely type code used for gc.relocate assertions [nfc] 2021-04-06 11:27:36 -07:00
TargetLowering.cpp [NFC] Use ArgListEntry indirect types more in ISel lowering 2021-05-18 14:30:22 -07:00