| .. |
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AsmParser
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[AMDGPU][MC][GFX9+] Enabled 21-bit signed offsets for SMEM instructions
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2020-05-06 14:13:10 +03:00 |
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Disassembler
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[AMDGPU][MC][GFX9+] Enabled 21-bit signed offsets for SMEM instructions
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2020-05-06 14:13:10 +03:00 |
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MCTargetDesc
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[AMDGPU][MC] Corrected branch relocation handling to detect undefined labels
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2020-05-18 14:04:58 +03:00 |
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TargetInfo
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CMake: Make most target symbols hidden by default
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2020-01-14 19:46:52 -08:00 |
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Utils
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[AMDGPU] Fixed incorrect PAL metadata register naming
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2020-05-21 22:13:19 +01:00 |
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AMDGPU.h
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[AMDGPU] Promote alloca to vector in opt
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2020-05-21 13:49:51 -07:00 |
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AMDGPU.td
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AMDGPU: Change pre-gfx9 implementation of fcanonicalize to mul
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2020-04-23 15:24:13 -04:00 |
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AMDGPUAliasAnalysis.cpp
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AMDGPU: Skip GetUnderlyingObject check in pointsToConstantMemory
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2020-05-09 16:00:08 -04:00 |
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AMDGPUAliasAnalysis.h
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…
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AMDGPUAlwaysInlinePass.cpp
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AMDGPU: Hack out noinline on functions using LDS globals
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2020-04-02 14:12:07 -04:00 |
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AMDGPUAnnotateKernelFeatures.cpp
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AMDGPU: Annotate functions that have stack objects
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2020-05-19 18:51:00 -04:00 |
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AMDGPUAnnotateUniformValues.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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AMDGPUArgumentUsageInfo.cpp
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AMDGPU: Add flag to used fixed function ABI
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2020-03-13 13:27:05 -07:00 |
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AMDGPUArgumentUsageInfo.h
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AMDGPUArgumentUsageInfo.h - cleanup includes and forward declarations. NFC.
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2020-04-24 16:21:37 +01:00 |
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AMDGPUAsmPrinter.cpp
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AMDGPU: Define mode register
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2020-05-23 13:24:42 -04:00 |
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AMDGPUAsmPrinter.h
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[AsmPrinter][MCStreamer] De-capitalize EmitInstruction and EmitCFI*
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2020-02-13 22:08:55 -08:00 |
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AMDGPUAtomicOptimizer.cpp
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[AMDGPU] New llvm.amdgcn.ballot intrinsic
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2020-03-31 10:35:39 +02:00 |
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AMDGPUCallLowering.cpp
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CodeGen: Use Register
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2020-05-19 17:56:55 -04:00 |
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AMDGPUCallLowering.h
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[Alignment][NFC] Transition to inferAlignFromPtrInfo
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2020-03-31 08:06:49 +00:00 |
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AMDGPUCallingConv.td
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[AMDGPU] Introduce more scratch registers in the ABI.
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2020-05-05 23:02:58 +05:30 |
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AMDGPUCodeGenPrepare.cpp
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[SVE] Remove usages of VectorType::getNumElements() from AMDGPU
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2020-05-13 15:57:55 -07:00 |
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AMDGPUCombine.td
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AMDGPU/GlobalISel: Combines for V_CVT_F32_UBYTE[0-3]
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2020-04-13 19:18:19 -04:00 |
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AMDGPUExportClustering.cpp
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[AMDGPU] Strengthen export cluster ordering
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2020-05-13 23:07:37 +09:00 |
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AMDGPUExportClustering.h
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[AMDGPU] Cluster shader exports
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2020-05-07 19:05:38 +09:00 |
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AMDGPUFeatures.td
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AMDGPU: Remove denormal subtarget features
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2020-04-02 17:17:12 -04:00 |
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AMDGPUFixFunctionBitcasts.cpp
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[IR] Replace all uses of CallBase::getCalledValue() with getCalledOperand().
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2020-04-27 22:17:03 -07:00 |
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AMDGPUFrameLowering.cpp
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Use Align for TFL::TransientStackAlignment
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2019-10-21 08:31:25 +00:00 |
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AMDGPUFrameLowering.h
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[Alignment][NFC] Deprecate Align::None()
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2020-01-24 12:53:58 +01:00 |
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AMDGPUGISel.td
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[llvm] NFC: Fix trivial typo in rst and td files
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2020-04-23 14:26:32 +09:00 |
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AMDGPUGenRegisterBankInfo.def
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[AMDGPU][GlobalISel] Revise handling of wide loads in RegBankSelect
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2020-05-11 18:10:16 -07:00 |
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AMDGPUGlobalISelUtils.cpp
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AMDGPU/GlobalISel: Select G_SHUFFLE_VECTOR
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2020-02-21 13:35:40 -05:00 |
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AMDGPUGlobalISelUtils.h
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AMDGPU/GlobalISel: Start selecting image intrinsics
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2020-03-30 17:33:04 -04:00 |
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AMDGPUHSAMetadataStreamer.cpp
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[SVE] Remove usages of VectorType::getNumElements() from AMDGPU
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2020-05-13 15:57:55 -07:00 |
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AMDGPUHSAMetadataStreamer.h
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…
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AMDGPUISelDAGToDAG.cpp
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[AMDGPU] Optimized indirect multi-VGPR addressing
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2020-05-13 14:53:16 -07:00 |
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AMDGPUISelLowering.cpp
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[DAGCombine] Remove the getNegatibleCost to avoid the out of sync with getNegatedExpression
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2020-05-20 02:12:16 +00:00 |
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AMDGPUISelLowering.h
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[DAGCombine] Remove the getNegatibleCost to avoid the out of sync with getNegatedExpression
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2020-05-20 02:12:16 +00:00 |
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AMDGPUInline.cpp
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Revert "Revert "[llvm][NFC] Cleanup uses of std::function in Inlining-related APIs""
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2020-05-15 12:29:16 -07:00 |
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AMDGPUInstrInfo.cpp
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[AMDGPU] Remove AMDGPURegisterInfo
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2020-02-11 11:13:38 -08:00 |
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AMDGPUInstrInfo.h
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AMDGPU/GlobalISel: Change intrinsic ID for _L to _LZ opt
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2020-04-01 13:03:02 -04:00 |
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AMDGPUInstrInfo.td
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[llvm] NFC: Fix trivial typo in rst and td files
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2020-04-23 14:26:32 +09:00 |
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AMDGPUInstructionSelector.cpp
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AMDGPU: Use Register
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2020-04-21 15:19:35 -04:00 |
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AMDGPUInstructionSelector.h
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AMDGPU/GlobalISel: Fix selection of scalar f64 G_FABS
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2020-04-14 22:05:22 -04:00 |
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AMDGPUInstructions.td
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AMDGPU: Change pre-gfx9 implementation of fcanonicalize to mul
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2020-04-23 15:24:13 -04:00 |
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AMDGPULegalizerInfo.cpp
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AMDGPU/GlobalISel: Fix masked control flow with fallthrough blocks
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2020-05-22 10:31:44 -04:00 |
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AMDGPULegalizerInfo.h
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AMDGPU/GlobalISel: Legalize 64-bit G_UDIV/G_UREM
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2020-03-30 10:57:37 -04:00 |
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AMDGPULibCalls.cpp
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AllocaInst should store Align instead of MaybeAlign.
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2020-05-16 14:53:16 -07:00 |
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AMDGPULibFunc.cpp
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[TypeSize] Allow returning scalable size in implicit conversion to uint64_t
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2020-03-15 13:48:49 +00:00 |
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AMDGPULibFunc.h
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Make llvm::StringRef to std::string conversions explicit.
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2020-01-28 23:25:25 +01:00 |
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AMDGPULowerIntrinsics.cpp
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AMDGPU: Add flag to control mem intrinsic expansion
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2020-02-03 14:26:01 -08:00 |
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AMDGPULowerKernelArguments.cpp
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[SVE] Remove usages of VectorType::getNumElements() from AMDGPU
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2020-05-13 15:57:55 -07:00 |
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AMDGPULowerKernelAttributes.cpp
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…
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AMDGPUMCInstLower.cpp
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[AsmPrinter][MCStreamer] De-capitalize EmitInstruction and EmitCFI*
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2020-02-13 22:08:55 -08:00 |
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AMDGPUMachineCFGStructurizer.cpp
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[AMDGPU] Fixes -Wrange-loop-analysis warnings
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2019-12-22 19:39:28 +01:00 |
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AMDGPUMachineFunction.cpp
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AMDGPU: Use member initializers in MFI
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2020-05-19 18:11:34 -04:00 |
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AMDGPUMachineFunction.h
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AMDGPU: Use member initializers in MFI
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2020-05-19 18:11:34 -04:00 |
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AMDGPUMachineModuleInfo.cpp
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…
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AMDGPUMachineModuleInfo.h
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…
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AMDGPUMacroFusion.cpp
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[AMDGPU] Extend macro fusion for ADDC and SUBB to SUBBREV
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2020-03-11 17:59:21 +00:00 |
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AMDGPUMacroFusion.h
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…
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AMDGPUOpenCLEnqueuedBlockLowering.cpp
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Avoid SmallString.h include in MD5.h, NFC
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2020-02-26 09:10:24 -08:00 |
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AMDGPUPTNote.h
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…
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AMDGPUPerfHintAnalysis.cpp
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[llvm][NFC][CallSite] Remove Implementation uses of CallSite
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2020-04-14 14:49:47 -07:00 |
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AMDGPUPerfHintAnalysis.h
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…
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AMDGPUPostLegalizerCombiner.cpp
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AMDGPU/GlobalISel: Combines for V_CVT_F32_UBYTE[0-3]
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2020-04-13 19:18:19 -04:00 |
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AMDGPUPreLegalizerCombiner.cpp
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AMDGPU/GlobalISel: Introduce post-legalize combiner
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2020-02-24 22:12:12 -05:00 |
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AMDGPUPrintfRuntimeBinding.cpp
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StoreInst should store Align, not MaybeAlign
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2020-05-15 12:26:58 -07:00 |
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AMDGPUPromoteAlloca.cpp
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[AMDGPU] Promote alloca to vector in opt
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2020-05-21 13:49:51 -07:00 |
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AMDGPUPropagateAttributes.cpp
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[AMDGPU] Propagate amdgpu-waves-per-eu to callees
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2020-03-26 14:43:44 -07:00 |
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AMDGPURegisterBankInfo.cpp
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AMDGPU/GlobalISel: Fix splitting 64-bit extensions
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2020-05-20 11:13:32 -04:00 |
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AMDGPURegisterBankInfo.h
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AMDGPU/GlobalISel: Handle sbfe/ubfe intrinsic
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2020-02-17 09:20:13 -05:00 |
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AMDGPURegisterBanks.td
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[AMDGPU] Define AGPR subregs
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2020-04-28 15:30:43 -07:00 |
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AMDGPURewriteOutArguments.cpp
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[SVE] Remove usages of VectorType::getNumElements() from AMDGPU
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2020-05-13 15:57:55 -07:00 |
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AMDGPUSearchableTables.td
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AMDGPU: llvm.amdgcn.writelane is a source of divergence
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2020-02-12 09:12:56 +01:00 |
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AMDGPUSubtarget.cpp
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Provide operand indices to adjustSchedDependency
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2020-04-17 11:08:44 +01:00 |
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AMDGPUSubtarget.h
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[AMDGPU] New SIInsertHardClauses pass
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2020-05-14 18:54:49 +01:00 |
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AMDGPUTargetMachine.cpp
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[AMDGPU] Promote alloca to vector in opt
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2020-05-21 13:49:51 -07:00 |
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AMDGPUTargetMachine.h
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AMDGPU: Add flag to used fixed function ABI
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2020-03-13 13:27:05 -07:00 |
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AMDGPUTargetObjectFile.cpp
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…
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AMDGPUTargetObjectFile.h
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…
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AMDGPUTargetTransformInfo.cpp
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Revert "[CostModel] Unify Intrinsic Costs."
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2020-05-21 12:50:24 +01:00 |
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AMDGPUTargetTransformInfo.h
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[NFCI][CostModel] Refactor getIntrinsicInstrCost
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2020-05-20 11:59:08 +01:00 |
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AMDGPUUnifyDivergentExitNodes.cpp
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[AMDGPU] Fix AMDGPUUnifyDivergentExitNodes
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2020-03-18 16:49:30 +01:00 |
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AMDGPUUnifyMetadata.cpp
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[AMDGPU] Fixes -Wrange-loop-analysis warnings
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2019-12-22 19:39:28 +01:00 |
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AMDILCFGStructurizer.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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AMDKernelCodeT.h
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…
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BUFInstructions.td
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[llvm] NFC: Fix trivial typo in rst and td files
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2020-04-23 14:26:32 +09:00 |
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CMakeLists.txt
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[AMDGPU] New SIInsertHardClauses pass
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2020-05-14 18:54:49 +01:00 |
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CaymanInstructions.td
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AMDGPU/EG,CM: Implement fsqrt using recip(rsqrt(x)) instead of x * rsqrt(x)
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2020-02-05 00:24:07 -05:00 |
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DSInstructions.td
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[llvm] NFC: Fix trivial typo in rst and td files
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2020-04-23 14:26:32 +09:00 |
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EvergreenInstructions.td
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[TableGen] Drop deprecated leading # operation (NOP) and replace ## with #
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2020-04-25 16:26:45 -07:00 |
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FLATInstructions.td
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[llvm] NFC: Fix trivial typo in rst and td files
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2020-04-23 14:26:32 +09:00 |
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GCNDPPCombine.cpp
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[AMDGPU][DPP] Corrected DPP combiner
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2019-11-20 15:56:45 +03:00 |
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GCNHazardRecognizer.cpp
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[AMDGPU] Don't implement GCNHazardRecognizer::PreEmitNoops(SUnit *)
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2020-05-06 16:11:19 +01:00 |
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GCNHazardRecognizer.h
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[AMDGPU] Don't implement GCNHazardRecognizer::PreEmitNoops(SUnit *)
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2020-05-06 16:11:19 +01:00 |
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GCNILPSched.cpp
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Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each
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2019-10-19 01:31:09 +00:00 |
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GCNIterativeScheduler.cpp
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[AMDGPU] Add file headers for few files where it is missing.
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2020-01-31 02:06:41 +05:30 |
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GCNIterativeScheduler.h
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[AMDGPU] Add file headers for few files where it is missing.
|
2020-01-31 02:06:41 +05:30 |
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GCNMinRegStrategy.cpp
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[AMDGPU] Add file headers for few files where it is missing.
|
2020-01-31 02:06:41 +05:30 |
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GCNNSAReassign.cpp
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AMDGPU/GFX10: Fix NSA reassign pass when operands are undef
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2020-02-01 22:41:40 +01:00 |
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GCNProcessors.td
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…
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GCNRegBankReassign.cpp
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[AMDGPU] Adapt GCNRegBankReassign for 16 bit subregs
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2020-04-28 16:16:04 -07:00 |
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GCNRegPressure.cpp
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[AMDGPU] Fix assumption about LaneBitmask content
|
2020-02-19 09:07:11 -08:00 |
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GCNRegPressure.h
|
Upgrade some instances of std::sort to llvm::sort. NFC.
|
2020-03-28 19:23:29 +01:00 |
|
GCNSchedStrategy.cpp
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[AMDGPU] Remove dubious logic in bidirectional list scheduler
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2020-02-28 21:35:34 +00:00 |
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GCNSchedStrategy.h
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[AMDGPU] Attempt to reschedule withou clustering
|
2020-01-27 10:27:16 -08:00 |
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LLVMBuild.txt
|
…
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|
|
MIMGInstructions.td
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[llvm] NFC: Fix trivial typo in rst and td files
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2020-04-23 14:26:32 +09:00 |
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R600.td
|
…
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R600AsmPrinter.cpp
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[MC] Add MCStreamer::emitInt{8,16,32,64}
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2020-02-29 09:40:21 -08:00 |
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R600AsmPrinter.h
|
[AsmPrinter][MCStreamer] De-capitalize EmitInstruction and EmitCFI*
|
2020-02-13 22:08:55 -08:00 |
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R600ClauseMergePass.cpp
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…
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|
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R600ControlFlowFinalizer.cpp
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[AMDGPU] Make use of divideCeil. NFC.
|
2020-03-26 16:11:35 +00:00 |
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R600Defines.h
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…
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|
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R600EmitClauseMarkers.cpp
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…
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R600ExpandSpecialInstrs.cpp
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[AMDGPU] Split R600 and GCN subregs
|
2020-02-10 08:29:56 -08:00 |
|
R600FrameLowering.cpp
|
CodeGen: Use Register in TargetFrameLowering
|
2020-04-07 17:07:44 -04:00 |
|
R600FrameLowering.h
|
CodeGen: Use Register in TargetFrameLowering
|
2020-04-07 17:07:44 -04:00 |
|
R600ISelLowering.cpp
|
CodeGen: Use Register in TargetFrameLowering
|
2020-04-07 17:07:44 -04:00 |
|
R600ISelLowering.h
|
…
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|
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R600InstrFormats.td
|
…
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|
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R600InstrInfo.cpp
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CodeGen: Use Register in TargetFrameLowering
|
2020-04-07 17:07:44 -04:00 |
|
R600InstrInfo.h
|
Use MCRegister in copyPhysReg
|
2019-11-11 14:42:33 +05:30 |
|
R600Instructions.td
|
AMDGPU: Remove denormal subtarget features
|
2020-04-02 17:17:12 -04:00 |
|
R600MachineFunctionInfo.cpp
|
…
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|
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R600MachineFunctionInfo.h
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…
|
|
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R600MachineScheduler.cpp
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…
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|
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R600MachineScheduler.h
|
…
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|
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R600OpenCLImageTypeLoweringPass.cpp
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…
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|
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R600OptimizeVectorRegisters.cpp
|
…
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|
|
R600Packetizer.cpp
|
…
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|
|
R600Processors.td
|
…
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|
|
R600RegisterInfo.cpp
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[TBLGEN] Allow to override RC weight
|
2020-02-14 15:49:52 -08:00 |
|
R600RegisterInfo.h
|
[TBLGEN] Allow to override RC weight
|
2020-02-14 15:49:52 -08:00 |
|
R600RegisterInfo.td
|
[TBLGEN] Allow to override RC weight
|
2020-02-14 15:49:52 -08:00 |
|
R600Schedule.td
|
…
|
|
|
R700Instructions.td
|
…
|
|
|
SIAddIMGInit.cpp
|
[AMDGPU] Split R600 and GCN subregs
|
2020-02-10 08:29:56 -08:00 |
|
SIAnnotateControlFlow.cpp
|
AMDGPU: Fix extra type mangling on llvm.amdgcn.if.break
|
2020-02-03 07:02:05 -08:00 |
|
SIDefines.h
|
…
|
|
|
SIFixSGPRCopies.cpp
|
[AMDGPU] Propagate AGPR RC from PHI to its PHI operands
|
2020-04-03 11:23:02 -07:00 |
|
SIFixVGPRCopies.cpp
|
…
|
|
|
SIFixupVectorISel.cpp
|
AMDGPU/GlobalISel: Skip DAG hack passes on selected functions
|
2020-02-17 08:33:17 -08:00 |
|
SIFoldOperands.cpp
|
[AMDGPU] Extend constant folding for logical operations
|
2020-04-07 14:37:16 -04:00 |
|
SIFormMemoryClauses.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
|
SIFrameLowering.cpp
|
[AMDGPU] Enable base pointer.
|
2020-05-17 16:13:55 +05:30 |
|
SIFrameLowering.h
|
For PAL, make sure Scratch Buffer Descriptor do not clobber GIT pointer
|
2020-05-06 10:31:15 -04:00 |
|
SIISelLowering.cpp
|
AMDGPU/GlobalISel: Fix masked control flow with fallthrough blocks
|
2020-05-22 10:31:44 -04:00 |
|
SIISelLowering.h
|
DAG: Fix wrong legality check for ISD::FMAD
|
2020-04-13 10:25:39 -07:00 |
|
SIInsertHardClauses.cpp
|
[AMDGPU] Fix assertion failure in SIInsertHardClauses
|
2020-05-15 15:49:52 +01:00 |
|
SIInsertSkips.cpp
|
[AMDGPU] Add SIPreEmitPeephole pass.
|
2020-03-25 15:35:35 +00:00 |
|
SIInsertWaitcnts.cpp
|
[AMDGPU] Remove unnecessary s_waitcnt between VMEM loads
|
2020-05-01 10:10:23 +01:00 |
|
SIInstrFormats.td
|
[AMDGPU] Add a16 feature to gfx10
|
2020-02-10 09:04:23 +01:00 |
|
SIInstrInfo.cpp
|
Collapse variable into assert to remove non-assert unused variable
|
2020-05-05 11:04:43 -07:00 |
|
SIInstrInfo.h
|
[AMDGPU] Fix FoldImmediate for 16 bit operand
|
2020-05-05 10:19:14 -07:00 |
|
SIInstrInfo.td
|
[llvm] NFC: Fix trivial typo in rst and td files
|
2020-04-23 14:26:32 +09:00 |
|
SIInstructions.td
|
[AMDGPU] Make v16f64/v16i64 legal
|
2020-05-14 14:46:55 -07:00 |
|
SILoadStoreOptimizer.cpp
|
AMDGPU: Break read2/write2 search range on a memory fence
|
2020-04-24 15:53:30 -04:00 |
|
SILowerControlFlow.cpp
|
[AMDGPU] Limit endcf-collapase to simple if
|
2020-04-07 10:27:23 -07:00 |
|
SILowerI1Copies.cpp
|
AMDGPU/GlobalISel: Skip DAG hack passes on selected functions
|
2020-02-17 08:33:17 -08:00 |
|
SILowerSGPRSpills.cpp
|
[AMDGPU] Reserving VGPR for future SGPR Spill
|
2020-05-12 00:33:00 +00:00 |
|
SIMachineFunctionInfo.cpp
|
AMDGPU: Annotate functions that have stack objects
|
2020-05-19 18:51:00 -04:00 |
|
SIMachineFunctionInfo.h
|
[AMDGPU] Enable base pointer.
|
2020-05-17 16:13:55 +05:30 |
|
SIMachineScheduler.cpp
|
[AMDGPU] Use generated RegisterPressureSets enum
|
2020-02-18 10:34:03 -08:00 |
|
SIMachineScheduler.h
|
[AMDGPU] Use generated RegisterPressureSets enum
|
2020-02-18 10:34:03 -08:00 |
|
SIMemoryLegalizer.cpp
|
[AMDGPU] Skip generating cache invalidating instructions on AMDPAL
|
2020-04-24 13:53:44 +02:00 |
|
SIModeRegister.cpp
|
…
|
|
|
SIOptimizeExecMasking.cpp
|
AMDGPU: Use Register
|
2019-12-27 16:53:21 -05:00 |
|
SIOptimizeExecMaskingPreRA.cpp
|
[AMDGPU] Don't assert on partial exec copy
|
2020-04-12 21:14:36 -07:00 |
|
SIPeepholeSDWA.cpp
|
Fix unused function warning (PR44808)
|
2020-02-12 15:12:48 +01:00 |
|
SIPostRABundler.cpp
|
[AMDGPU] Drop const for value that is copied (NFC).
|
2020-03-30 10:59:59 +01:00 |
|
SIPreAllocateWWMRegs.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
|
SIPreEmitPeephole.cpp
|
[AMDGPU] Process V_MOV_B32_indirect in SET_GPR_IDX optimization
|
2020-05-19 21:37:14 -07:00 |
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SIProgramInfo.h
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[AMDGPU] separate accounting for agprs
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2019-10-02 00:26:58 +00:00 |
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SIRegisterInfo.cpp
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AMDGPU: Implement isConstantPhysReg
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2020-05-23 13:24:42 -04:00 |
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SIRegisterInfo.h
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AMDGPU: Implement isConstantPhysReg
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2020-05-23 13:24:42 -04:00 |
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SIRegisterInfo.td
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AMDGPU: Define mode register
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2020-05-23 13:24:42 -04:00 |
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SIRemoveShortExecBranches.cpp
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[AMDGPU] Don't remove short branches over kills
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2020-02-03 09:26:52 +00:00 |
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SISchedule.td
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[llvm] NFC: Fix trivial typo in rst and td files
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2020-04-23 14:26:32 +09:00 |
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SIShrinkInstructions.cpp
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AMDGPU: Use early return
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2020-04-07 13:48:00 -04:00 |
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SIWholeQuadMode.cpp
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[AMDGPU] Fix whole wavefront mode
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2020-03-17 17:23:23 +01:00 |
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SMInstructions.td
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[AMDGPU][MC][GFX9+] Enabled 21-bit signed offsets for SMEM instructions
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2020-05-06 14:13:10 +03:00 |
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SOPInstructions.td
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[llvm] NFC: Fix trivial typo in rst and td files
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2020-04-23 14:26:32 +09:00 |
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VIInstrFormats.td
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…
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VIInstructions.td
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[llvm] NFC: Fix trivial typo in rst and td files
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2020-04-23 14:26:32 +09:00 |
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VOP1Instructions.td
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AMDGPU: Fix illegally constant folding from V_MOV_B32_sdwa
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2020-05-18 15:34:33 -04:00 |
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VOP2Instructions.td
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[AMDGPU][MC][GFX8+] Enabled clamp for v_mul_i32_i24_e64 and v_mul_u32_u24_e64
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2020-05-22 14:11:31 +03:00 |
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VOP3Instructions.td
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[AMDGPU][MC][GFX9+] Enabled clamp for v_add_i32 and v_sub_i32
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2020-05-13 14:17:20 +03:00 |
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VOP3PInstructions.td
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[TableGen] Drop deprecated leading # operation (NOP) and replace ## with #
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2020-04-25 16:26:45 -07:00 |
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VOPCInstructions.td
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[llvm] NFC: Fix trivial typo in rst and td files
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2020-04-23 14:26:32 +09:00 |
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VOPInstructions.td
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[llvm] NFC: Fix trivial typo in rst and td files
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2020-04-23 14:26:32 +09:00 |
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sroa-before-unroll.ll
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[AMDGPU] Promote alloca to vector in opt
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2020-05-21 13:49:51 -07:00 |
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