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AArch64
AArch64: Add aditional Cyclone macroop fusion opportunities
2015-07-20 22:34:47 +00:00
AMDGPU
AMDGPU/SI: Add VI patterns to select FLAT instructions for global memory ops
2015-07-20 14:28:41 +00:00
ARM
[ARM] Make the frame lowering code ready for shrink-wrapping.
2015-07-22 16:34:37 +00:00
BPF
[bpf] rename triple names bpf_be -> bpfeb
2015-06-05 16:11:14 +00:00
CPP
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
Generic
Targets: commonize some stack realignment code
2015-07-20 22:51:32 +00:00
Hexagon
[Hexagon] Generate MUX from conditional transfers when dot-new not possible
2015-07-20 21:23:25 +00:00
Inputs
IR: Give 'DI' prefix to debug info metadata
2015-04-29 16:38:44 +00:00
MIR
MIR Serialization: Serialize the machine instruction's debug location.
2015-07-22 21:15:11 +00:00
MSP430
[opaque pointer type] Add textual IR support for explicit type parameter to gep operator
2015-03-13 18:20:45 +00:00
Mips
[SDAG] Optimize unordered comparison in soft-float mode (patch by Anton Nadolskiy)
2015-07-15 08:39:35 +00:00
NVPTX
[BranchFolding] do not iterate the aliases of virtual registers
2015-07-22 04:16:52 +00:00
PowerPC
[PPC64LE] More vector swap optimization TLC
2015-07-21 21:40:17 +00:00
SPARC
[SPARC] Cleanup handling of the Y/ASR registers.
2015-07-08 16:25:12 +00:00
SystemZ
[DAGCombiner] Account for getVectorIdxTy() when narrowing vector load
2015-05-05 19:34:10 +00:00
Thumb
[ARM] Make the frame lowering code ready for shrink-wrapping.
2015-07-22 16:34:37 +00:00
Thumb2
ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2
2015-07-21 00:18:59 +00:00
WebAssembly
WebAssembly: basic bitcode → assembly CodeGen test
2015-07-22 21:28:15 +00:00
WinEH
[WinEH] Strip the \01 character from the __CxxFrameHandler3 thunk name
2015-07-13 17:55:14 +00:00
X86
X86: Fixed assertion failure in 32-bit mode
2015-07-23 08:25:23 +00:00
XCore
Move the personality function from LandingPadInst to Function
2015-06-17 20:52:32 +00:00