forked from OSchip/llvm-project
51 lines
1.6 KiB
C++
51 lines
1.6 KiB
C++
//===-- TargetInstrInfo.cpp - Target Instruction Information --------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the TargetInstrInfo class.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/Constant.h"
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#include "llvm/DerivedTypes.h"
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using namespace llvm;
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TargetInstrInfo::TargetInstrInfo(const TargetInstrDesc* Desc,
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unsigned numOpcodes)
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: Descriptors(Desc), NumOpcodes(numOpcodes) {
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}
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TargetInstrInfo::~TargetInstrInfo() {
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}
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bool TargetInstrInfo::isUnpredicatedTerminator(const MachineInstr *MI) const {
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const TargetInstrDesc &TID = MI->getDesc();
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if (!TID.isTerminator()) return false;
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// Conditional branch is a special case.
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if (TID.isBranch() && !TID.isBarrier())
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return true;
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if (!TID.isPredicable())
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return true;
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return !isPredicated(MI);
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}
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/// getInstrOperandRegClass - Return register class of the operand of an
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/// instruction of the specified TargetInstrDesc.
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const TargetRegisterClass*
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llvm::getInstrOperandRegClass(const TargetRegisterInfo *TRI,
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const TargetInstrDesc &II, unsigned Op) {
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if (Op >= II.getNumOperands())
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return NULL;
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if (II.OpInfo[Op].isLookupPtrRegClass())
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return TRI->getPointerRegClass();
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return TRI->getRegClass(II.OpInfo[Op].RegClass);
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}
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