forked from OSchip/llvm-project
48 lines
1.6 KiB
LLVM
48 lines
1.6 KiB
LLVM
; RUN: llc %s -mtriple=arm-linux-gnueabi -filetype=obj -o - | \
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; RUN: llvm-readobj -s -sd | FileCheck -check-prefix=BASIC %s
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; RUN: llc %s -mtriple=armv7-linux-gnueabi -march=arm -mcpu=cortex-a8 \
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; RUN: -mattr=-neon,-vfp3,+vfp2 \
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; RUN: -arm-reserve-r9 -filetype=obj -o - | \
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; RUN: llvm-readobj -s -sd | FileCheck -check-prefix=CORTEXA8 %s
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; This tests that the extpected ARM attributes are emitted.
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;
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; BASIC: Section {
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; BASIC: Name: .ARM.attributes
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; BASIC-NEXT: Type: SHT_ARM_ATTRIBUTES
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; BASIC-NEXT: Flags [ (0x0)
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; BASIC-NEXT: ]
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; BASIC-NEXT: Address: 0x0
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; BASIC-NEXT: Offset: 0x3C
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; BASIC-NEXT: Size: 28
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; BASIC-NEXT: Link: 0
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; BASIC-NEXT: Info: 0
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; BASIC-NEXT: AddressAlignment: 1
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; BASIC-NEXT: EntrySize: 0
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; BASIC-NEXT: SectionData (
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; BASIC-NEXT: 0000: 411B0000 00616561 62690001 11000000
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; BASIC-NEXT: 0010: 06011401 15011703 18011901
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; BASIC-NEXT: )
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; CORTEXA8: Name: .ARM.attributes
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; CORTEXA8-NEXT: Type: SHT_ARM_ATTRIBUTES
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; CORTEXA8-NEXT: Flags [ (0x0)
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; CORTEXA8-NEXT: ]
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; CORTEXA8-NEXT: Address: 0x0
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; CORTEXA8-NEXT: Offset: 0x3C
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; CORTEXA8-NEXT: Size: 47
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; CORTEXA8-NEXT: Link: 0
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; CORTEXA8-NEXT: Info: 0
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; CORTEXA8-NEXT: AddressAlignment: 1
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; CORTEXA8-NEXT: EntrySize: 0
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; CORTEXA8-NEXT: SectionData (
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; CORTEXA8-NEXT: 0000: 412E0000 00616561 62690001 24000000
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; CORTEXA8-NEXT: 0010: 05434F52 5445582D 41380006 0A074108
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; CORTEXA8-NEXT: 0020: 0109020A 02140115 01170318 011901
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; CORTEXA8-NEXT: )
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define i32 @f(i64 %z) {
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ret i32 0
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}
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