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llvm-project/llvm/test/MC
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Kazushi (Jam) Marukawa ccb6191f04 [VE] Add missing regression test 
In the previous "Add vector shift instructions", I forgot to add
regression tests for VSRL and VSRD instructions.  This patch is
adding them.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D90167
 		2020-10-27 20:40:30 +09:00
..
AArch64 [AArch64] Implement .variant_pcs directive 2020-10-13 10:06:27 +00:00
AMDGPU [AMDGPU] flat scratch ST addressing mode on gfx10 2020-10-19 15:29:52 -07:00
ARM llvm-dwarfdump: Dump address forms in their encoded length rather than always in 64 bits 2020-10-04 15:48:57 -07:00
AVR [AVRInstPrinter] printOperand: support llvm-objdump --print-imm-hex 2020-07-12 08:14:52 -07:00
AsmParser Introduce and use a new section type for the bb_addr_map section. 2020-10-08 11:13:19 -07:00
BPF [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
COFF [test][MC] Use %python in llvm/test/MC/COFF/bigobj.py 2020-10-07 14:03:28 -04:00
Disassembler [X86] Don't disassemble wbinvd with 0xf2 or 0x66 prefix. 2020-10-25 20:56:01 -07:00
ELF [X86] Produce R_X86_64_GOTPCRELX for test/binop instructions (MOV32rm/TEST32rm/...) when -Wa,-mrelax-relocations=yes is enabled 2020-10-24 15:14:17 -07:00
Hexagon [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
Lanai
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MSP430 [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
MachO llvm-dwarfdump: Dump address forms in their encoded length rather than always in 64 bits 2020-10-04 15:48:57 -07:00
Mips Show register names in DWARF unwind info. 2020-10-05 15:34:33 -07:00
PowerPC [PowerPC] Add outer product instructions for MMA 2020-09-30 18:06:49 -05:00
RISCV [RISCV] Support vmsge.vx and vmsgeu.vx pseudo instructions in RVV. 2020-10-02 17:20:34 +08:00
Sparc [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
SystemZ [SystemZAsmParser] Treat VR128 separately in ParseDirectiveInsn(). 2020-10-06 14:42:40 +02:00
VE [VE] Add missing regression test 2020-10-27 20:40:30 +09:00
WebAssembly [WebAssembly] Implementation of (most) table instructions 2020-10-23 08:42:54 -07:00
X86 [X86] Produce R_X86_64_GOTPCRELX for test/binop instructions (MOV32rm/TEST32rm/...) when -Wa,-mrelax-relocations=yes is enabled 2020-10-24 15:14:17 -07:00