llvm-project/llvm/test/CodeGen
Simon Pilgrim 7e671e06a2 [X86][AVX2] Fix SIGN_EXTEND vector handling on AVX2 targets.
On AVX2 target we are poorly legalizing SIGN_EXTEND ops for which the input's legalized type doesn't have the same number of elements as the destination, resulting in an ANY_EXTEND followed by a SIGN_EXTEND_INREG.

This patch uses the existing SIGN_EXTEND -> SIGN_EXTEND_VECTOR_INREG combine to extend the input to the size of the result and using SIGN_EXTEND_VECTOR_INREG instead.

Differential Revision: http://reviews.llvm.org/D16994

llvm-svn: 260210
2016-02-09 08:19:19 +00:00
..
AArch64 AArch64: match correct order in subtraction pattern. 2016-02-08 19:33:18 +00:00
AMDGPU AMDGPU: Remove bfi and bfm intrinsics 2016-02-08 19:06:01 +00:00
ARM ARM: support TLS for WoA 2016-02-03 18:21:59 +00:00
BPF Revert "Change memcpy/memset/memmove to have dest and source alignments." 2015-11-19 05:56:52 +00:00
CPP Fix CPP Backend for GEP API changes for opaque pointer types 2015-09-08 18:42:29 +00:00
Generic Remove autoconf support 2016-01-26 21:29:08 +00:00
Hexagon The canonical way to XFAIL a test for all targets is XFAIL: *, not XFAIL: 2016-02-04 16:21:38 +00:00
Inputs DI: Reverse direction of subprogram -> function edge. 2015-11-05 22:03:56 +00:00
MIR Reapply r257105 "[Verifier] Check that debug values have proper size" 2016-01-15 00:46:17 +00:00
MSP430 Revert "Change memcpy/memset/memmove to have dest and source alignments." 2015-11-19 05:56:52 +00:00
Mips [mips] Add SHF_MIPS_GPREL flag to the MIPS .sbss and .sdata sections 2016-02-03 11:50:22 +00:00
NVPTX [NVPTX] Disable performance optimizations when OptLevel==None 2016-02-04 04:15:36 +00:00
PowerPC Add the missing test case for PR26193 2016-02-05 15:03:17 +00:00
SPARC [SPARC] Revamp AnalyzeBranch and add ReverseBranchCondition. 2016-01-13 04:44:14 +00:00
SystemZ [SystemZ] Fix wrong-code generation for certain always-false conditions 2016-02-01 18:31:19 +00:00
Thumb [MC] Use .p2align instead of .align 2016-01-26 00:03:25 +00:00
Thumb2 [SCEV] Try to reuse existing value during SCEV expansion 2016-02-04 01:27:38 +00:00
WebAssembly [WebAssembly] Update the br_if instructions' operand orders to match the spec. 2016-02-08 21:50:13 +00:00
WinEH Revert r258580 and r258581. 2016-02-01 03:29:38 +00:00
X86 [X86][AVX2] Fix SIGN_EXTEND vector handling on AVX2 targets. 2016-02-09 08:19:19 +00:00
XCore [MC] Use .p2align instead of .align 2016-01-26 00:03:25 +00:00