forked from OSchip/llvm-project
26 lines
987 B
C
26 lines
987 B
C
// REQUIRES: hexagon-registered-target
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// RUN: %clang_cc1 %s -triple hexagon -verify -target-cpu hexagonv55 -S -o - -DTEST_V60
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// RUN: %clang_cc1 %s -triple hexagon -verify -target-cpu hexagonv55 -S -o - -DTEST_V62
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// RUN: %clang_cc1 %s -triple hexagon -verify -target-cpu hexagonv55 -S -o - -DTEST_V65
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#ifdef TEST_V60
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unsigned builtin_needs_v60(unsigned Rs) {
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// expected-error-re@+1 {{'__builtin_HEXAGON_S6_rol_i_r' needs target feature v60|{{.*}}}}
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return __builtin_HEXAGON_S6_rol_i_r(Rs, 3);
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}
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#endif
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#ifdef TEST_V62
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unsigned long long builtin_needs_v62(unsigned Rs) {
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// expected-error-re@+1 {{'__builtin_HEXAGON_S6_vsplatrbp' needs target feature v62|{{.*}}}}
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return __builtin_HEXAGON_S6_vsplatrbp(Rs);
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}
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#endif
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#ifdef TEST_V65
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unsigned builtin_needs_v65(unsigned long long Rss, unsigned long long Rtt) {
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// expected-error-re@+1 {{'__builtin_HEXAGON_A6_vcmpbeq_notany' needs target feature v65|{{.*}}}}
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return __builtin_HEXAGON_A6_vcmpbeq_notany(Rss, Rtt);
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}
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#endif
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