llvm-project/llvm/lib/CodeGen
Argyrios Kyrtzidis 17c981a45b Revert Chris' commits up to r149348 that started causing VMCoreTests unit test to fail.
These are:

r149348
r149351
r149352
r149354
r149356
r149357
r149361
r149362
r149364
r149365

llvm-svn: 149470
2012-02-01 04:51:17 +00:00
..
AsmPrinter Revert Chris' commits up to r149348 that started causing VMCoreTests unit test to fail. 2012-02-01 04:51:17 +00:00
SelectionDAG Revert Chris' commits up to r149348 that started causing VMCoreTests unit test to fail. 2012-02-01 04:51:17 +00:00
AggressiveAntiDepBreaker.cpp AggressiveAntiDepBreaker needs to skip debug values because a debug value does not have a corresponding SUnit 2012-01-16 22:53:41 +00:00
AggressiveAntiDepBreaker.h Rename TargetSubtarget to TargetSubtargetInfo for consistency. 2011-07-01 21:01:15 +00:00
AllocationOrder.cpp Rename TRI::getAllocationOrder() to getRawAllocationOrder(). 2011-06-16 23:31:16 +00:00
AllocationOrder.h Fix old doxygen comment. 2012-01-24 18:09:18 +00:00
Analysis.cpp More dead code removal (using -Wunreachable-code) 2012-01-20 21:51:11 +00:00
AntiDepBreaker.h Update DBG_VALUEs while breaking anti dependencies. 2011-06-02 21:26:52 +00:00
BranchFolding.cpp More dead code removal (using -Wunreachable-code) 2012-01-20 21:51:11 +00:00
BranchFolding.h When tail-merging multiple blocks, make sure to correctly update the live-in list on the merged block to correctly account for the live-outs of all the predecessors. They might not be the same in all cases (the testcase I have involves a PHI node where one of the operands is an IMPLICIT_DEF). 2011-07-06 23:41:48 +00:00
CMakeLists.txt Added the MachineSchedulerPass skeleton. 2012-01-13 06:30:30 +00:00
CalcSpillWeights.cpp Move CalculateRegClass to MRI::recomputeRegClass. 2011-08-09 16:46:27 +00:00
CallingConvLower.cpp Rename the ParmContext enum values to make a bit more sense and add a small 2011-06-10 20:37:36 +00:00
CodeGen.cpp Renamed MachineScheduler to ScheduleTopDownLive. 2012-01-17 06:55:03 +00:00
CodePlacementOpt.cpp Fix a ton of comment typos found by codespell. Patch by 2011-04-15 05:18:47 +00:00
CriticalAntiDepBreaker.cpp Added a late machine instruction copy propagation pass. This catches 2012-01-07 03:02:36 +00:00
CriticalAntiDepBreaker.h Teach antidependency breakers to use RegisterClassInfo. 2011-06-16 21:56:21 +00:00
DFAPacketizer.cpp use space star instead of star space 2011-12-06 17:34:16 +00:00
DeadMachineInstructionElim.cpp Handle register masks in DeadMachineInstructionElim. 2012-01-20 22:27:09 +00:00
DwarfEHPrepare.cpp Reapply r149159 with a fix to add to a PHI node with a non-null parent. 2012-01-28 01:17:56 +00:00
EdgeBundles.cpp Twinify GraphWriter a little bit. 2011-11-15 16:26:38 +00:00
ExecutionDepsFix.cpp Move common code into an MRI function. 2011-12-21 19:50:05 +00:00
ExpandISelPseudos.cpp Add bundle aware API for querying instruction properties and switch the code 2011-12-07 07:15:52 +00:00
ExpandPostRAPseudos.cpp Add bundle aware API for querying instruction properties and switch the code 2011-12-07 07:15:52 +00:00
GCMetadata.cpp Add 'llvm_unreachable' to passify GCC's understanding of the constraints 2012-01-10 18:08:01 +00:00
GCMetadataPrinter.cpp
GCStrategy.cpp More dead code removal (using -Wunreachable-code) 2012-01-20 21:51:11 +00:00
IfConversion.cpp Add a if-conversion optimization that allows 'true' side of a diamond to be 2011-12-19 22:01:30 +00:00
InlineSpiller.cpp Fixed register allocator splitting a live range on a spilling variable. 2011-12-12 22:16:27 +00:00
InterferenceCache.cpp Remove pointless mode line in .cpp file. 2012-01-13 22:04:16 +00:00
InterferenceCache.h Allow null interference cursors to be queried. 2011-07-23 03:10:17 +00:00
IntrinsicLowering.cpp Remove the now-dead llvm.eh.exception and llvm.eh.selector intrinsics. 2012-01-31 01:58:48 +00:00
JITCodeEmitter.cpp Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
LLVMBuild.txt LLVMBuild: Introduce a common section which currently has a list of the 2011-12-12 22:45:54 +00:00
LLVMTargetMachine.cpp Add an option to disable buggy copy propagation pass 2012-01-22 14:08:34 +00:00
LatencyPriorityQueue.cpp Various bits of framework needed for precise machine-level selection 2010-12-24 05:03:26 +00:00
LexicalScopes.cpp Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
LiveDebugVariables.cpp Add bundle aware API for querying instruction properties and switch the code 2011-12-07 07:15:52 +00:00
LiveDebugVariables.h Update LiveDebugVariables after live range splitting. 2011-05-06 18:00:02 +00:00
LiveInterval.cpp Use getVNInfoBefore() when it makes sense. 2011-11-14 01:39:36 +00:00
LiveIntervalAnalysis.cpp Here's a new one: GCC was complaining about an only-used-in-asserts 2012-01-30 19:26:20 +00:00
LiveIntervalUnion.cpp Oops - LiveIntervalUnion.cpp file does use std::find. Moving STL header include to LiveIntervalUnion.cpp file. 2011-12-21 20:16:11 +00:00
LiveIntervalUnion.h Remove disused STL header include. 2011-12-21 20:12:54 +00:00
LiveRangeCalc.cpp Fix assert condition. 2011-12-20 20:23:40 +00:00
LiveRangeCalc.h Unbreak msvc. 2011-09-13 03:58:34 +00:00
LiveRangeEdit.cpp Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
LiveRangeEdit.h Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
LiveStackAnalysis.cpp Move getCommonSubClass() into TRI. 2011-09-30 22:18:51 +00:00
LiveVariables.cpp Fix an obvious typo. 2012-01-21 03:31:03 +00:00
LocalStackSlotAllocation.cpp Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there. 2011-01-10 12:39:04 +00:00
MachineBasicBlock.cpp Update comment for r149070. 2012-01-26 20:19:05 +00:00
MachineBlockFrequencyInfo.cpp Add some constantness to BranchProbabilityInfo and BlockFrequnencyInfo. 2011-12-20 20:03:10 +00:00
MachineBlockPlacement.cpp Revert patch from 147090. There is not point to make code less readable if we 2011-12-21 23:02:08 +00:00
MachineBranchProbabilityInfo.cpp Add some constantness to BranchProbabilityInfo and BlockFrequnencyInfo. 2011-12-20 20:03:10 +00:00
MachineCSE.cpp Avoid CSE of instructions which define physical registers across MBBs unless 2012-01-11 00:38:11 +00:00
MachineCodeEmitter.cpp Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
MachineCopyPropagation.cpp Clear kill flags before propagating a copy. 2012-01-26 17:52:15 +00:00
MachineDominators.cpp
MachineFunction.cpp make sure the file's matching header is #include'd first. 2012-01-27 01:47:28 +00:00
MachineFunctionAnalysis.cpp Sink codegen optimization level into MCCodeGenInfo along side relocation model 2011-11-16 08:38:26 +00:00
MachineFunctionPass.cpp
MachineFunctionPrinterPass.cpp
MachineInstr.cpp Clear kill flags before propagating a copy. 2012-01-26 17:52:15 +00:00
MachineInstrBundle.cpp More bundle related API additions. 2012-01-19 07:47:03 +00:00
MachineLICM.cpp Fix PR11829. PostRA LICM was too aggressive. 2012-01-23 21:01:15 +00:00
MachineLoopInfo.cpp
MachineLoopRanges.cpp
MachineModuleInfo.cpp Add an ivar that maps a landing pad's EH symbol to the call sites that may jump 2011-10-05 22:20:38 +00:00
MachineModuleInfoImpls.cpp
MachinePassRegistry.cpp Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
MachineRegisterInfo.cpp Extract method for detecting constant unallocatable physregs. 2012-01-16 22:34:08 +00:00
MachineSSAUpdater.cpp More dead code removal (using -Wunreachable-code) 2012-01-20 21:51:11 +00:00
MachineScheduler.cpp Add a "moveInstr" method to LiveIntervals. This can be used to move instructions 2012-01-27 22:36:19 +00:00
MachineSink.cpp Extract method for detecting constant unallocatable physregs. 2012-01-16 22:34:08 +00:00
MachineVerifier.cpp - Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function 2011-12-14 02:11:42 +00:00
Makefile
OcamlGC.cpp
OptimizePHIs.cpp When deleting a phi cycle after looking through copies, constrain the register 2011-10-17 21:54:46 +00:00
PHIElimination.cpp Delete an unused member variable. 2012-01-20 22:48:59 +00:00
PHIEliminationUtils.cpp
PHIEliminationUtils.h
Passes.cpp Delete the linear scan register allocator. 2011-11-12 22:39:45 +00:00
PeepholeOptimizer.cpp Add bundle aware API for querying instruction properties and switch the code 2011-12-07 07:15:52 +00:00
PostRASchedulerList.cpp misched: Added ScheduleDAGInstrs::IsPostRA 2012-01-14 02:17:12 +00:00
ProcessImplicitDefs.cpp Improve sub-register def handling in ProcessImplicitDefs. 2012-01-25 23:36:27 +00:00
PrologEpilogInserter.cpp Move common code into an MRI function. 2011-12-21 19:50:05 +00:00
PrologEpilogInserter.h
PseudoSourceValue.cpp More dead code removal (using -Wunreachable-code) 2012-01-20 21:51:11 +00:00
README.txt Fix a ton of comment typos found by codespell. Patch by 2011-04-15 05:18:47 +00:00
RegAllocBase.cpp Sink spillInterferences into RABasic. 2012-01-11 22:52:14 +00:00
RegAllocBase.h Make data structures private. 2012-01-11 23:19:08 +00:00
RegAllocBasic.cpp Renamed MachineScheduler to ScheduleTopDownLive. 2012-01-17 06:55:03 +00:00
RegAllocFast.cpp Obvious unnecessary loop removal. Follow through from previous checkin. 2012-01-31 18:54:19 +00:00
RegAllocGreedy.cpp Renamed MachineScheduler to ScheduleTopDownLive. 2012-01-17 06:55:03 +00:00
RegAllocPBQP.cpp Freeze reserved registers before starting register allocation. 2012-01-05 00:26:49 +00:00
RegisterClassInfo.cpp Detect proper register sub-classes. 2011-08-05 21:28:14 +00:00
RegisterClassInfo.h Detect proper register sub-classes. 2011-08-05 21:28:14 +00:00
RegisterCoalescer.cpp Remove code that adds live ranges for dead defs. It seems to be breaking things. 2012-01-28 01:17:01 +00:00
RegisterCoalescer.h Rename member variables to follow coding standards. 2011-08-09 01:01:27 +00:00
RegisterScavenging.cpp Fix some scavenger performance issues. 2012-01-29 01:29:28 +00:00
RenderMachineFunction.cpp Fix typo in ruler. No functionality change. 2012-01-03 18:22:43 +00:00
RenderMachineFunction.h
ScheduleDAG.cpp misched: Initial code for building an MI level scheduling DAG 2012-01-14 02:17:18 +00:00
ScheduleDAGEmit.cpp createMCInstPrinter doesn't need TargetMachine anymore. 2011-07-06 19:45:42 +00:00
ScheduleDAGInstrs.cpp misched: Initial code for building an MI level scheduling DAG 2012-01-14 02:17:18 +00:00
ScheduleDAGInstrs.h misched: Initial code for building an MI level scheduling DAG 2012-01-14 02:17:18 +00:00
ScheduleDAGPrinter.cpp drop unneeded config.h includes 2011-12-22 23:04:07 +00:00
ScoreboardHazardRecognizer.cpp Remove unnecessary default cases in switches that cover all enum values. 2012-01-10 16:47:17 +00:00
ShadowStackGC.cpp Use the C personality function instead of the C++ personality function. 2011-09-22 17:56:40 +00:00
ShrinkWrapping.cpp Add bundle aware API for querying instruction properties and switch the code 2011-12-07 07:15:52 +00:00
SjLjEHPrepare.cpp Place the GEP instructions nearer to the instructions which use them. 2012-01-27 02:02:24 +00:00
SlotIndexes.cpp Use the standard MachineFunction::print() after SlotIndexes. 2012-01-24 23:28:38 +00:00
SpillPlacement.cpp Be more conservative when forming compact regions. 2011-08-03 23:09:38 +00:00
SpillPlacement.h Be more conservative when forming compact regions. 2011-08-03 23:09:38 +00:00
Spiller.cpp Add 'llvm_unreachable' to passify GCC's understanding of the constraints 2012-01-10 18:08:01 +00:00
Spiller.h Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
SplitKit.cpp More dead code removal (using -Wunreachable-code) 2012-01-20 21:51:11 +00:00
SplitKit.h Make SplitAnalysis::UseSlots private. 2012-01-12 17:53:44 +00:00
StackProtector.cpp Enable stack protectors for all arrays, not just char arrays. rdar://5875909 2011-11-23 07:13:56 +00:00
StackSlotColoring.cpp Allow inlining of functions with returns_twice calls, if they have the 2011-12-18 20:35:43 +00:00
StrongPHIElimination.cpp Rename SlotIndexes to match how they are used. 2011-11-13 20:45:27 +00:00
TailDuplication.cpp Add bundle aware API for querying instruction properties and switch the code 2011-12-07 07:15:52 +00:00
TargetFrameLoweringImpl.cpp Move parts of lib/Target that use CodeGen into lib/CodeGen. 2011-12-15 22:58:58 +00:00
TargetInstrInfoImpl.cpp Extract method for detecting constant unallocatable physregs. 2012-01-16 22:34:08 +00:00
TargetLoweringObjectFileImpl.cpp Properly emit ctors / dtors with priorities into desired sections 2012-01-25 22:24:19 +00:00
TargetOptionsImpl.cpp Move parts of lib/Target that use CodeGen into lib/CodeGen. 2011-12-15 22:58:58 +00:00
TwoAddressInstructionPass.cpp Set correct <def,undef> flags when lowering REG_SEQUENCE. 2012-01-24 23:28:42 +00:00
UnreachableBlockElim.cpp Fix PR10029 - VerifyCoalescing failure on patterns_dfa.c of 445.gobmk. 2011-05-27 05:04:51 +00:00
VirtRegMap.cpp Rewriter should definitly rewrite instructions inside bundles. 2012-01-19 07:46:36 +00:00
VirtRegMap.h More dead code elimination in VirtRegMap. 2011-11-13 01:23:34 +00:00

README.txt

//===---------------------------------------------------------------------===//

Common register allocation / spilling problem:

        mul lr, r4, lr
        str lr, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        ldr r4, [sp, #+52]
        mla r4, r3, lr, r4

can be:

        mul lr, r4, lr
        mov r4, lr
        str lr, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        mla r4, r3, lr, r4

and then "merge" mul and mov:

        mul r4, r4, lr
        str lr, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        mla r4, r3, lr, r4

It also increase the likelihood the store may become dead.

//===---------------------------------------------------------------------===//

bb27 ...
        ...
        %reg1037 = ADDri %reg1039, 1
        %reg1038 = ADDrs %reg1032, %reg1039, %NOREG, 10
    Successors according to CFG: 0x8b03bf0 (#5)

bb76 (0x8b03bf0, LLVM BB @0x8b032d0, ID#5):
    Predecessors according to CFG: 0x8b0c5f0 (#3) 0x8b0a7c0 (#4)
        %reg1039 = PHI %reg1070, mbb<bb76.outer,0x8b0c5f0>, %reg1037, mbb<bb27,0x8b0a7c0>

Note ADDri is not a two-address instruction. However, its result %reg1037 is an
operand of the PHI node in bb76 and its operand %reg1039 is the result of the
PHI node. We should treat it as a two-address code and make sure the ADDri is
scheduled after any node that reads %reg1039.

//===---------------------------------------------------------------------===//

Use local info (i.e. register scavenger) to assign it a free register to allow
reuse:
        ldr r3, [sp, #+4]
        add r3, r3, #3
        ldr r2, [sp, #+8]
        add r2, r2, #2
        ldr r1, [sp, #+4]  <==
        add r1, r1, #1
        ldr r0, [sp, #+4]
        add r0, r0, #2

//===---------------------------------------------------------------------===//

LLVM aggressively lift CSE out of loop. Sometimes this can be negative side-
effects:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
load [i + R1]
...
load [i + R2]
...
load [i + R3]

Suppose there is high register pressure, R1, R2, R3, can be spilled. We need
to implement proper re-materialization to handle this:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
R1 = X + 4  @ re-materialized
load [i + R1]
...
R2 = X + 7 @ re-materialized
load [i + R2]
...
R3 = X + 15 @ re-materialized
load [i + R3]

Furthermore, with re-association, we can enable sharing:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
T = i + X
load [T + 4]
...
load [T + 7]
...
load [T + 15]
//===---------------------------------------------------------------------===//

It's not always a good idea to choose rematerialization over spilling. If all
the load / store instructions would be folded then spilling is cheaper because
it won't require new live intervals / registers. See 2003-05-31-LongShifts for
an example.

//===---------------------------------------------------------------------===//

With a copying garbage collector, derived pointers must not be retained across
collector safe points; the collector could move the objects and invalidate the
derived pointer. This is bad enough in the first place, but safe points can
crop up unpredictably. Consider:

        %array = load { i32, [0 x %obj] }** %array_addr
        %nth_el = getelementptr { i32, [0 x %obj] }* %array, i32 0, i32 %n
        %old = load %obj** %nth_el
        %z = div i64 %x, %y
        store %obj* %new, %obj** %nth_el

If the i64 division is lowered to a libcall, then a safe point will (must)
appear for the call site. If a collection occurs, %array and %nth_el no longer
point into the correct object.

The fix for this is to copy address calculations so that dependent pointers
are never live across safe point boundaries. But the loads cannot be copied
like this if there was an intervening store, so may be hard to get right.

Only a concurrent mutator can trigger a collection at the libcall safe point.
So single-threaded programs do not have this requirement, even with a copying
collector. Still, LLVM optimizations would probably undo a front-end's careful
work.

//===---------------------------------------------------------------------===//

The ocaml frametable structure supports liveness information. It would be good
to support it.

//===---------------------------------------------------------------------===//

The FIXME in ComputeCommonTailLength in BranchFolding.cpp needs to be
revisited. The check is there to work around a misuse of directives in inline
assembly.

//===---------------------------------------------------------------------===//

It would be good to detect collector/target compatibility instead of silently
doing the wrong thing.

//===---------------------------------------------------------------------===//

It would be really nice to be able to write patterns in .td files for copies,
which would eliminate a bunch of explicit predicates on them (e.g. no side 
effects).  Once this is in place, it would be even better to have tblgen 
synthesize the various copy insertion/inspection methods in TargetInstrInfo.

//===---------------------------------------------------------------------===//

Stack coloring improvements:

1. Do proper LiveStackAnalysis on all stack objects including those which are
   not spill slots.
2. Reorder objects to fill in gaps between objects.
   e.g. 4, 1, <gap>, 4, 1, 1, 1, <gap>, 4 => 4, 1, 1, 1, 1, 4, 4

//===---------------------------------------------------------------------===//

The scheduler should be able to sort nearby instructions by their address. For
example, in an expanded memset sequence it's not uncommon to see code like this:

  movl $0, 4(%rdi)
  movl $0, 8(%rdi)
  movl $0, 12(%rdi)
  movl $0, 0(%rdi)

Each of the stores is independent, and the scheduler is currently making an
arbitrary decision about the order.

//===---------------------------------------------------------------------===//

Another opportunitiy in this code is that the $0 could be moved to a register:

  movl $0, 4(%rdi)
  movl $0, 8(%rdi)
  movl $0, 12(%rdi)
  movl $0, 0(%rdi)

This would save substantial code size, especially for longer sequences like
this. It would be easy to have a rule telling isel to avoid matching MOV32mi
if the immediate has more than some fixed number of uses. It's more involved
to teach the register allocator how to do late folding to recover from
excessive register pressure.