| .. |
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GlobalISel
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[RISCV GlobalISel] Adding initial GlobalISel infrastructure
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2019-08-20 22:53:24 +00:00 |
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intrinsics
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[RISCV] Lower llvm.trap and llvm.debugtrap
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2019-10-28 09:54:33 +00:00 |
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add-before-shl.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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addc-adde-sube-subc.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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addcarry.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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align.ll
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…
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alloca.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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alu8.ll
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…
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alu16.ll
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…
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alu32.ll
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[RISCV] Custom legalize i32 operations for RV64 to reduce signed extensions
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2019-08-06 00:24:00 +00:00 |
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alu64.ll
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Reland [MachineCopyPropagation] Extend MCP to do trivial copy backward propagation.
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2019-12-05 14:32:11 +08:00 |
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analyze-branch.ll
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…
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arith-with-overflow.ll
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[TargetLowering] Simplify expansion of S{ADD,SUB}O
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2019-09-30 07:58:50 +00:00 |
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atomic-cmpxchg-flag.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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atomic-cmpxchg.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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atomic-fence.ll
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…
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atomic-load-store.ll
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…
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atomic-rmw.ll
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[MBP] Avoid tail duplication if it can't bring benefit
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2019-12-06 09:53:53 -08:00 |
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bare-select.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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blockaddress.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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branch-relaxation.ll
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[RISCV] Match GNU tools canonical JALR and add aliases
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2019-07-16 04:56:43 +00:00 |
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branch.ll
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[RISCV][NFC] Add nounwind attribute to functions missing it in test/CodeGen/RISCV
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2019-05-23 12:43:13 +00:00 |
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bswap-ctlz-cttz-ctpop.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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byval.ll
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…
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callee-saved-fpr32s.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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callee-saved-fpr64s.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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callee-saved-gprs.ll
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[RISCV] Remove RA from reserved register to use as callee saved register
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2019-10-29 11:32:16 +08:00 |
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calling-conv-ilp32-ilp32f-common.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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calling-conv-ilp32-ilp32f-ilp32d-common.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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calling-conv-ilp32.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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calling-conv-ilp32d.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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calling-conv-ilp32f-ilp32d-common.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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calling-conv-lp64-lp64f-common.ll
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…
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calling-conv-lp64-lp64f-lp64d-common.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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calling-conv-lp64.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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calling-conv-rv32f-ilp32.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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calling-conv-sext-zext.ll
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…
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calls.ll
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[RISCV] Lower calls through PLT
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2019-06-18 14:29:45 +00:00 |
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codemodel-lowering.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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compress-inline-asm.ll
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[RISCV] Support llvm-objdump -M no-aliases and -M numeric
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2019-09-10 16:24:03 +00:00 |
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compress.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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copysign-casts.ll
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[LegalizeTypes][RISCV] Soften FCOPYSIGN operand
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2019-11-26 15:22:55 +00:00 |
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disable-tail-calls.ll
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…
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disjoint.ll
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[RISCV] Add InstrInfo areMemAccessesTriviallyDisjoint hook
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2019-11-05 09:39:06 +00:00 |
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div.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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double-arith.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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double-bitmanip-dagcombines.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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double-br-fcmp.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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double-calling-conv.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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double-convert.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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double-fcmp.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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double-frem.ll
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…
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double-imm.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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double-intrinsics.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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double-mem.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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double-previous-failure.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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double-select-fcmp.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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double-stack-spill-restore.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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dwarf-eh.ll
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[RISCV][NFC] Remove outdated TODO from test/CodeGen/RISCV/dwarf-eh.ll
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2019-07-17 14:04:48 +00:00 |
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exception-pointer-register.ll
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[RISCV] Fix wrong CFI directives
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2019-11-14 18:29:50 +00:00 |
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fastcc-float.ll
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[RISCV] Support fast calling convention
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2019-10-15 02:04:29 +00:00 |
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fastcc-int.ll
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[RISCV] Support fast calling convention
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2019-10-15 02:04:29 +00:00 |
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fixups-diff.ll
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…
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fixups-relax-diff.ll
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[DebugInfo] Generate fixups as emitting DWARF .debug_frame/.eh_frame.
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2019-07-19 02:03:34 +00:00 |
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float-arith.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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float-bit-preserving-dagcombines.ll
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[RISCV] Support Bit-Preserving FP in F/D Extensions
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2019-06-07 12:20:14 +00:00 |
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float-bitmanip-dagcombines.ll
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…
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float-br-fcmp.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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float-convert.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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float-fcmp.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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float-frem.ll
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…
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float-imm.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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float-intrinsics.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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float-mem.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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float-select-fcmp.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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flt-rounds.ll
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…
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fp16-promote.ll
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[RISCV] Add support for half-precision floats
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2019-10-25 14:02:02 +01:00 |
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fp128.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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frame-info.ll
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[RISCV] Fix wrong CFI directives
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2019-11-14 18:29:50 +00:00 |
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frame.ll
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…
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frameaddr-returnaddr.ll
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…
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get-register-invalid.ll
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[RISCV] Implement the TargetLowering::getRegisterByName hook
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2019-11-04 11:23:54 +00:00 |
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get-register-noreserve.ll
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[RISCV] Implement the TargetLowering::getRegisterByName hook
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2019-11-04 11:23:54 +00:00 |
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get-register-reserve.ll
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[RISCV] Implement the TargetLowering::getRegisterByName hook
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2019-11-04 11:23:54 +00:00 |
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get-setcc-result-type.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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hoist-global-addr-base.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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i32-icmp.ll
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…
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imm-cse.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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imm.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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indirectbr.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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init-array.ll
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[IR] Disallow llvm.global_ctors and llvm.global_dtors of the 2-field form in textual format
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2019-05-15 02:35:32 +00:00 |
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inline-asm-abi-names.ll
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[RISCV] Allow ABI Names in Inline Assembly Constraints
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2019-08-08 14:59:16 +00:00 |
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inline-asm-clobbers.ll
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[RISCV] Add support for lowering floating point inlineasm clobbers
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2019-07-31 09:07:21 +00:00 |
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inline-asm-d-abi-names.ll
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[RISCV] Allow ABI Names in Inline Assembly Constraints
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2019-08-08 14:59:16 +00:00 |
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inline-asm-d-constraint-f.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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inline-asm-f-abi-names.ll
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[RISCV] Allow ABI Names in Inline Assembly Constraints
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2019-08-08 14:59:16 +00:00 |
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inline-asm-f-constraint-f.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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inline-asm-i-constraint-i1.ll
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[TargetLowering] Extend bool args to inline-asm according to getBooleanType
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2019-05-22 16:16:15 +00:00 |
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inline-asm-invalid.ll
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Emit diagnostic if an inline asm constraint requires an immediate
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2019-08-03 05:52:47 +00:00 |
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inline-asm.ll
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[RISCV] Fix a couple of tests' CHECKs
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2019-08-30 12:11:47 +00:00 |
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interrupt-attr-args-error.ll
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…
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interrupt-attr-invalid.ll
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…
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interrupt-attr-nocall.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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interrupt-attr-ret-error.ll
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…
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interrupt-attr.ll
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[RISCV][NFC] Add nounwind attribute to functions missing it in test/CodeGen/RISCV
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2019-05-16 13:56:23 +00:00 |
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jumptable.ll
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[RISCV][NFC] Add nounwind attribute to functions missing it in test/CodeGen/RISCV
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2019-05-23 12:43:13 +00:00 |
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large-stack.ll
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[RISCV] Fix wrong CFI directives
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2019-11-14 18:29:50 +00:00 |
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legalize-fneg.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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lit.local.cfg
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…
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lsr-legaladdimm.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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mattr-invalid-combination.ll
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…
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mem.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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mem64.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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mir-target-flags.ll
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[RISCV] Fix mir-target-flags.ll
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2019-12-09 13:51:08 +00:00 |
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mul.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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musttail-call.ll
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…
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option-norelax.ll
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…
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option-norvc.ll
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[RISCV] Support llvm-objdump -M no-aliases and -M numeric
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2019-09-10 16:24:03 +00:00 |
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option-relax.ll
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…
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option-rvc.ll
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[RISCV] Support llvm-objdump -M no-aliases and -M numeric
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2019-09-10 16:24:03 +00:00 |
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pic-models.ll
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[RISCV] Add lowering of addressing sequences for PIC
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2019-06-11 12:57:47 +00:00 |
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pr40333.ll
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…
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prefetch.ll
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…
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readcyclecounter.ll
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[RISCV] Support @llvm.readcyclecounter() Intrinsic
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2019-07-05 12:35:21 +00:00 |
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rem.ll
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…
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remat.ll
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[MBP] Avoid tail duplication if it can't bring benefit
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2019-12-06 09:53:53 -08:00 |
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reserved-reg-errors.ll
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[RISCV] Add support for -ffixed-xX flags
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2019-10-22 21:25:01 +01:00 |
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reserved-regs.ll
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[RISCV] Add support for -ffixed-xX flags
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2019-10-22 21:25:01 +01:00 |
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rotl-rotr.ll
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[RISCV][NFC] Add nounwind attribute to functions missing it in test/CodeGen/RISCV
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2019-05-23 12:43:13 +00:00 |
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rv32e.ll
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…
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rv32i-rv64i-float-double.ll
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[RISCV] Avoid generating AssertZext for LP64 ABI when lowering floating LibCall
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2019-08-28 23:40:37 +00:00 |
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rv64-large-stack.ll
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[RISCV] Split SP adjustment to reduce the offset of callee saved register spill and restore
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2019-10-04 02:00:57 +00:00 |
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rv64d-double-convert.ll
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…
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rv64f-float-convert.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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rv64i-complex-float.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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rv64i-exhaustive-w-insts.ll
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[RISCV] Custom legalize i32 operations for RV64 to reduce signed extensions
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2019-08-06 00:24:00 +00:00 |
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rv64i-single-softfloat.ll
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[RISCV] Avoid generating AssertZext for LP64 ABI when lowering floating LibCall
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2019-08-28 23:40:37 +00:00 |
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rv64i-tricky-shifts.ll
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[RISCV][NFC] Add nounwind attribute to functions missing it in test/CodeGen/RISCV
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2019-05-23 12:43:13 +00:00 |
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rv64i-w-insts-legalization.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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rv64m-exhaustive-w-insts.ll
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[RISCV] Custom legalize i32 operations for RV64 to reduce signed extensions
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2019-08-06 00:24:00 +00:00 |
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rv64m-w-insts-legalization.ll
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[RISCV] Custom legalize i32 operations for RV64 to reduce signed extensions
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2019-08-06 00:24:00 +00:00 |
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sdata-limit-0.ll
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[RISCV] Put data smaller than eight bytes to small data section
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2019-04-11 04:59:13 +00:00 |
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sdata-limit-4.ll
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[RISCV] Put data smaller than eight bytes to small data section
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2019-04-11 04:59:13 +00:00 |
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sdata-limit-8.ll
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[RISCV] Put data smaller than eight bytes to small data section
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2019-04-11 04:59:13 +00:00 |
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sdata-local-sym.ll
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[RISCV] Put data smaller than eight bytes to small data section
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2019-04-11 04:59:13 +00:00 |
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select-cc.ll
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[RISCV][NFC] Add nounwind attribute to functions missing it in test/CodeGen/RISCV
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2019-05-23 12:43:13 +00:00 |
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select-optimize-multiple.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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select-optimize-multiple.mir
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
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2019-09-11 11:16:48 +00:00 |
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setcc-logic.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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sext-zext-trunc.ll
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[RISCV][NFC] Add nounwind attribute to functions missing it in test/CodeGen/RISCV
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2019-05-23 12:43:13 +00:00 |
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shift-masked-shamt.ll
|
…
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shifts.ll
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Reland [MachineCopyPropagation] Extend MCP to do trivial copy backward propagation.
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2019-12-05 14:32:11 +08:00 |
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split-offsets.ll
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[RISCV] Fix wrong CFI directives
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2019-11-14 18:29:50 +00:00 |
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split-sp-adjust.ll
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[RISCV] Split SP adjustment to reduce the offset of callee saved register spill and restore
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2019-10-04 02:00:57 +00:00 |
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srem-lkk.ll
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[RISCV][NFC] Add nounwind to LKK test functions
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2019-11-11 09:51:37 +00:00 |
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srem-vector-lkk.ll
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[RISCV][NFC] Add nounwind to LKK test functions
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2019-11-11 09:51:37 +00:00 |
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stack-realignment-with-variable-sized-objects.ll
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[RISCV] Handle variable sized objects with the stack need to be realigned
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2019-11-16 12:39:53 +08:00 |
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stack-realignment.ll
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[RISCV] Split SP adjustment to reduce the offset of callee saved register spill and restore
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2019-10-04 02:00:57 +00:00 |
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tail-calls.ll
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[RISCV] Enable tail call opt for variadic function
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2019-09-04 02:03:36 +00:00 |
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target-abi-invalid.ll
|
…
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target-abi-valid.ll
|
…
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tls-models.ll
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[RISCV] Don't force Local Exec TLS for non-PIC
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2019-12-03 22:04:54 +00:00 |
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umulo-128-legalisation-lowering.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
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urem-lkk.ll
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[RISCV][NFC] Add nounwind to LKK test functions
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2019-11-11 09:51:37 +00:00 |
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urem-vector-lkk.ll
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[RISCV][NFC] Add nounwind to LKK test functions
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2019-11-11 09:51:37 +00:00 |
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vararg.ll
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[RISCV] Fix wrong CFI directives
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2019-11-14 18:29:50 +00:00 |
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verify-instr.mir
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[RISCV] Add MachineInstr immediate verification
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2019-10-16 15:06:02 +00:00 |
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wide-mem.ll
|
…
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zext-with-load-is-free.ll
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[RISCV] Switch to the Machine Scheduler
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2019-09-17 11:15:35 +00:00 |
cb664baf50