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addrmode2-reencoding.txt
ARM: change implicit immediate forms of {ld,st}r{,b}t to psuedo-instructions
2014-01-12 04:36:01 +00:00
arm-LDREXD-reencoding.txt
ARM: Fix STREX/LDREX reecoding
2013-06-11 08:03:20 +00:00
arm-STREXD-reencoding.txt
ARM: Fix STREX/LDREX reecoding
2013-06-11 08:03:20 +00:00
arm-tests.txt
This reverts r155000.
2013-06-20 17:42:36 +00:00
arm-thumb-trustzone.txt
ARM: Make "SMC" instructions conditional on new TrustZone architecture feature.
2013-04-10 12:08:35 +00:00
arm-trustzone.txt
ARM: Make "SMC" instructions conditional on new TrustZone architecture feature.
2013-04-10 12:08:35 +00:00
basic-arm-instructions-v8.txt
[ARM] Handling for coprocessor instructions that are undefined starting from ARMv8 (ARM encodings)
2013-11-08 16:16:30 +00:00
basic-arm-instructions.txt
[ARM] Introduce the 'sevl' instruction in ARMv8.
2013-10-01 12:39:11 +00:00
crc32-thumb.txt
'svn add' the test cases.
2013-09-18 09:46:49 +00:00
crc32.txt
'svn add' the test cases.
2013-09-18 09:46:49 +00:00
fp-armv8.txt
[ARM] Add support for MVFR2 which is new in ARMv8
2013-11-11 19:56:13 +00:00
fp-encoding.txt
This patch adds support for FPINST/FPINST2 as operands to vmsr/vmrs. These are optional registers that may be supported some ARM implementations to aid with resolution of floating point exceptions. The manual pages for vmsr and vmrs do not detail their use. Encodings and other information can be found in ARM Architecture Reference Manual section F, chapter 6, paragraph 3.
2013-06-11 09:39:51 +00:00
hex-immediates.txt
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invalid-FSTMX-arm.txt
ARM: add fstmx and fldmx instructions for assembly
2013-05-31 15:55:51 +00:00
invalid-IT-CC15.txt
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invalid-armv7.txt
[ARM] Introduce the 'sevl' instruction in ARMv8.
2013-10-01 12:39:11 +00:00
invalid-armv8.txt
[ARM] Handling for coprocessor instructions that are undefined starting from ARMv8 (ARM encodings)
2013-11-08 16:17:14 +00:00
invalid-because-armv7.txt
[ARM] Add support for MVFR2 which is new in ARMv8
2013-11-11 19:56:13 +00:00
invalid-thumbv7-xfail.txt
Improve llvm-mc disassembler mode and refactor ARM tests to use it
2013-07-19 10:05:04 +00:00
invalid-thumbv7.txt
ARM: provide diagnostics on more writeback LDM/STM instructions
2013-10-22 19:00:39 +00:00
invalid-thumbv8.txt
[ARM] Handling for coprocessor instructions that are undefined starting from ARMv8 (Thumb encodings)
2013-11-08 16:25:50 +00:00
ldrd-armv4.txt
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lit.local.cfg
[tests] Cleanup initialization of test suffixes.
2013-08-16 00:37:11 +00:00
load-store-acquire-release-v8-thumb.txt
[ARMv8] Add MC support for the new load/store acquire/release instructions.
2013-08-27 17:38:16 +00:00
load-store-acquire-release-v8.txt
[ARMv8] Add MC support for the new load/store acquire/release instructions.
2013-08-27 17:38:16 +00:00
marked-up-thumb.txt
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memory-arm-instructions.txt
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neon-crypto.txt
[ARMv8] Add support for the v8 cryptography extensions.
2013-09-19 11:59:01 +00:00
neon-tests.txt
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neon-v8.txt
[ARMv8] Implement the NEON instructions VRINT{N, X, A, Z, M, P}.
2013-07-19 16:34:16 +00:00
neon.txt
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neont-VLD-reencoding.txt
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neont-VST-reencoding.txt
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neont2.txt
ARM: Enforce decoding rules for VLDn instructions
2013-06-11 08:14:14 +00:00
thumb-MSR-MClass.txt
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thumb-fp-armv8.txt
Fix tests for hasFPARMv8 name change (r190692)
2013-09-13 14:37:52 +00:00
thumb-neon-crypto.txt
[ARM] NEON instructions were erroneously decoded from certain invalid encodings
2013-10-30 18:10:09 +00:00
thumb-neon-v8.txt
[ARMv8] Implement the NEON instructions VRINT{N, X, A, Z, M, P}.
2013-07-19 16:34:16 +00:00
thumb-printf.txt
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thumb-tests.txt
This fixes the Thumb2 CPS assembly syntax.
2013-08-09 13:52:32 +00:00
thumb-v8.txt
[ARMv8] Add some missing tests for DSB/DMB.
2013-09-05 16:05:45 +00:00
thumb1.txt
This corrects the implementation of Thumb ADR instruction. There are three issues:
2013-07-03 09:21:44 +00:00
thumb2-v8.txt
[ARM] Handling for coprocessor instructions that are undefined starting from ARMv8 (Thumb encodings)
2013-11-08 16:25:50 +00:00
thumb2.txt
Make ARM hint ranges consistent, and add tests for these ranges
2013-10-23 10:14:40 +00:00
unpredictable-ADC-arm.txt
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unpredictable-ADDREXT3-arm.txt
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unpredictable-AExtI-arm.txt
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unpredictable-AI1cmp-arm.txt
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unpredictable-BFI.txt
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unpredictable-LDR-arm.txt
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unpredictable-LDRD-arm.txt
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unpredictable-LSL-regform.txt
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unpredictable-MRRC2-arm.txt
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unpredictable-MRS-arm.txt
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unpredictable-MUL-arm.txt
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unpredictable-RSC-arm.txt
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unpredictable-SEL-arm.txt
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unpredictable-SHADD16-arm.txt
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unpredictable-SSAT-arm.txt
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unpredictable-STRBrs-arm.txt
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unpredictable-UQADD8-arm.txt
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unpredictable-swp-arm.txt
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unpredictables-thumb.txt
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vfp4.txt
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