forked from OSchip/llvm-project
56 lines
1.3 KiB
YAML
56 lines
1.3 KiB
YAML
# RUN: llc -march=hexagon -verify-machineinstrs -run-pass branch-folder -o - %s | FileCheck %s
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# CHECK-LABEL: name: fred
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--- |
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define void @fred() { ret void }
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...
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---
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name: fred
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: %p2, %r0
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successors: %bb.1, %bb.2
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J2_jumpt killed %p2, %bb.1, implicit-def %pc
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J2_jump %bb.2, implicit-def %pc
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bb.1:
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liveins: %r0, %r19
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successors: %bb.3
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%r2 = A2_tfrsi 4
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%r1 = COPY %r19
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%r0 = S2_asl_r_r killed %r0, killed %r2
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%r0 = A2_asrh killed %r0
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J2_jump %bb.3, implicit-def %pc
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bb.2:
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liveins: %r0, %r18
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successors: %bb.3
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%r2 = A2_tfrsi 5
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%r1 = L2_loadrh_io %r18, 0
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%r0 = S2_asl_r_r killed %r0, killed %r2
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%r0 = A2_asrh killed %r0
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bb.3:
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; A live-in register without subregs, but with a lane mask that is not ~0
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; is not recognized by LivePhysRegs. Branch folding exposes this problem
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; (through tail merging).
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;
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; CHECK: bb.3:
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; CHECK: liveins:{{.*}}%p0
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; CHECK: %r0 = S2_asl_r_r killed %r0, killed %r2
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; CHECK: %r0 = A2_asrh killed %r0
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; CHECK: %r0 = C2_cmoveit killed %p0, 1
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; CHECK: J2_jumpr %r31, implicit-def %pc, implicit %r0
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;
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liveins: %p0:0x1
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%r0 = C2_cmoveit killed %p0, 1
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J2_jumpr %r31, implicit-def %pc, implicit %r0
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...
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