forked from OSchip/llvm-project
493 lines
16 KiB
LLVM
493 lines
16 KiB
LLVM
; RUN: llc -mtriple=x86_64-pc-linux -x86-cmov-converter=true -verify-machineinstrs < %s | FileCheck -allow-deprecated-dag-overlap %s
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; This test checks that x86-cmov-converter optimization transform CMOV
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;; instruction into branches when it is profitable.
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;; There are 5 cases below:
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;; 1. CmovInCriticalPath:
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;; CMOV depends on the condition and it is in the hot path.
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;; Thus, it worths transforming.
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;;
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;; 2. CmovNotInCriticalPath:
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;; Similar test like in (1), just that CMOV is not in the hot path.
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;; Thus, it does not worth transforming.
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;;
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;; 3. MaxIndex:
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;; Maximum calculation algorithm that is looking for the max index,
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;; calculating CMOV value is cheaper than calculating CMOV condition.
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;; Thus, it worths transforming.
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;;
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;; 4. MaxValue:
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;; Maximum calculation algorithm that is looking for the max value,
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;; calculating CMOV value is not cheaper than calculating CMOV condition.
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;; Thus, it does not worth transforming.
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;;
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;; 5. BinarySearch:
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;; Usually, binary search CMOV is not predicted.
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;; Thus, it does not worth transforming.
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;;
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;; Test was created using the following command line:
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;; > clang -S -O2 -m64 -fno-vectorize -fno-unroll-loops -emit-llvm foo.c -o -
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;; Where foo.c is:
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;void CmovInHotPath(int n, int a, int b, int *c, int *d) {
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;; for (int i = 0; i < n; i++) {
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;; int t = c[i] + 1;
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;; if (c[i] * a > b)
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;; t = 10;
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;; c[i] = (c[i] + 1) * t;
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;; }
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;;}
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;;
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;;
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;;void CmovNotInHotPath(int n, int a, int b, int *c, int *d) {
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;; for (int i = 0; i < n; i++) {
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;; int t = c[i];
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;; if (c[i] * a > b)
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;; t = 10;
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;; c[i] = t;
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;; d[i] /= b;
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;; }
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;;}
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;;
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;;
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;;int MaxIndex(int n, int *a) {
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;; int t = 0;
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;; for (int i = 1; i < n; i++) {
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;; if (a[i] > a[t])
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;; t = i;
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;; }
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;; return a[t];
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;;}
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;;
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;;
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;;int MaxValue(int n, int *a) {
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;; int t = a[0];
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;; for (int i = 1; i < n; i++) {
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;; if (a[i] > t)
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;; t = a[i];
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;; }
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;; return t;
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;;}
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;;
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;;typedef struct Node Node;
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;;struct Node {
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;; unsigned Val;
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;; Node *Right;
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;; Node *Left;
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;;};
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;;
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;;unsigned BinarySearch(unsigned Mask, Node *Curr, Node *Next) {
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;; while (Curr->Val > Next->Val) {
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;; Curr = Next;
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;; if (Mask & (0x1 << Curr->Val))
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;; Next = Curr->Right;
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;; else
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;; Next = Curr->Left;
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;; }
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;; return Curr->Val;
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;;}
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;;
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;;
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;;void SmallGainPerLoop(int n, int a, int b, int *c, int *d) {
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;; for (int i = 0; i < n; i++) {
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;; int t = c[i];
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;; if (c[i] * a > b)
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;; t = 10;
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;; c[i] = t;
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;; }
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;;}
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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%struct.Node = type { i32, %struct.Node*, %struct.Node* }
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; CHECK-LABEL: CmovInHotPath
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; CHECK-NOT: cmov
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; CHECK: jg
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define void @CmovInHotPath(i32 %n, i32 %a, i32 %b, i32* nocapture %c, i32* nocapture readnone %d) #0 {
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entry:
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%cmp14 = icmp sgt i32 %n, 0
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br i1 %cmp14, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader: ; preds = %entry
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%wide.trip.count = zext i32 %n to i64
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br label %for.body
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for.cond.cleanup: ; preds = %for.body, %entry
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ret void
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for.body: ; preds = %for.body.preheader, %for.body
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %for.body.preheader ]
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%arrayidx = getelementptr inbounds i32, i32* %c, i64 %indvars.iv
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%0 = load i32, i32* %arrayidx, align 4
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%add = add nsw i32 %0, 1
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%mul = mul nsw i32 %0, %a
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%cmp3 = icmp sgt i32 %mul, %b
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%. = select i1 %cmp3, i32 10, i32 %add
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%mul7 = mul nsw i32 %., %add
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store i32 %mul7, i32* %arrayidx, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count
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br i1 %exitcond, label %for.cond.cleanup, label %for.body
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}
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; CHECK-LABEL: CmovNotInHotPath
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; CHECK: cmovg
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define void @CmovNotInHotPath(i32 %n, i32 %a, i32 %b, i32* nocapture %c, i32* nocapture %d) #0 {
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entry:
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%cmp18 = icmp sgt i32 %n, 0
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br i1 %cmp18, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader: ; preds = %entry
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%wide.trip.count = zext i32 %n to i64
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br label %for.body
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for.cond.cleanup: ; preds = %for.body, %entry
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ret void
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for.body: ; preds = %for.body.preheader, %for.body
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %for.body.preheader ]
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%arrayidx = getelementptr inbounds i32, i32* %c, i64 %indvars.iv
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%0 = load i32, i32* %arrayidx, align 4
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%mul = mul nsw i32 %0, %a
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%cmp3 = icmp sgt i32 %mul, %b
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%. = select i1 %cmp3, i32 10, i32 %0
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store i32 %., i32* %arrayidx, align 4
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%arrayidx7 = getelementptr inbounds i32, i32* %d, i64 %indvars.iv
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%1 = load i32, i32* %arrayidx7, align 4
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%div = sdiv i32 %1, %b
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store i32 %div, i32* %arrayidx7, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count
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br i1 %exitcond, label %for.cond.cleanup, label %for.body
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}
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; CHECK-LABEL: MaxIndex
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; CHECK-NOT: cmov
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; CHECK: jg
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define i32 @MaxIndex(i32 %n, i32* nocapture readonly %a) #0 {
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entry:
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%cmp14 = icmp sgt i32 %n, 1
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br i1 %cmp14, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader: ; preds = %entry
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%wide.trip.count = zext i32 %n to i64
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br label %for.body
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for.cond.cleanup.loopexit: ; preds = %for.body
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%phitmp = sext i32 %i.0.t.0 to i64
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br label %for.cond.cleanup
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for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %entry
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%t.0.lcssa = phi i64 [ 0, %entry ], [ %phitmp, %for.cond.cleanup.loopexit ]
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%arrayidx5 = getelementptr inbounds i32, i32* %a, i64 %t.0.lcssa
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%0 = load i32, i32* %arrayidx5, align 4
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ret i32 %0
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for.body: ; preds = %for.body.preheader, %for.body
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 1, %for.body.preheader ]
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%t.015 = phi i32 [ %i.0.t.0, %for.body ], [ 0, %for.body.preheader ]
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%arrayidx = getelementptr inbounds i32, i32* %a, i64 %indvars.iv
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%1 = load i32, i32* %arrayidx, align 4
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%idxprom1 = sext i32 %t.015 to i64
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%arrayidx2 = getelementptr inbounds i32, i32* %a, i64 %idxprom1
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%2 = load i32, i32* %arrayidx2, align 4
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%cmp3 = icmp sgt i32 %1, %2
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%3 = trunc i64 %indvars.iv to i32
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%i.0.t.0 = select i1 %cmp3, i32 %3, i32 %t.015
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count
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br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
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}
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; CHECK-LABEL: MaxValue
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; CHECK-NOT: jg
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; CHECK: cmovg
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define i32 @MaxValue(i32 %n, i32* nocapture readonly %a) #0 {
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entry:
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%0 = load i32, i32* %a, align 4
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%cmp13 = icmp sgt i32 %n, 1
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br i1 %cmp13, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader: ; preds = %entry
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%wide.trip.count = zext i32 %n to i64
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br label %for.body
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for.cond.cleanup: ; preds = %for.body, %entry
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%t.0.lcssa = phi i32 [ %0, %entry ], [ %.t.0, %for.body ]
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ret i32 %t.0.lcssa
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for.body: ; preds = %for.body.preheader, %for.body
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 1, %for.body.preheader ]
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%t.014 = phi i32 [ %.t.0, %for.body ], [ %0, %for.body.preheader ]
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%arrayidx1 = getelementptr inbounds i32, i32* %a, i64 %indvars.iv
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%1 = load i32, i32* %arrayidx1, align 4
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%cmp2 = icmp sgt i32 %1, %t.014
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%.t.0 = select i1 %cmp2, i32 %1, i32 %t.014
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count
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br i1 %exitcond, label %for.cond.cleanup, label %for.body
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}
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; CHECK-LABEL: BinarySearch
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; CHECK: set
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define i32 @BinarySearch(i32 %Mask, %struct.Node* nocapture readonly %Curr, %struct.Node* nocapture readonly %Next) #0 {
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entry:
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%Val8 = getelementptr inbounds %struct.Node, %struct.Node* %Curr, i64 0, i32 0
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%0 = load i32, i32* %Val8, align 8
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%Val19 = getelementptr inbounds %struct.Node, %struct.Node* %Next, i64 0, i32 0
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%1 = load i32, i32* %Val19, align 8
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%cmp10 = icmp ugt i32 %0, %1
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br i1 %cmp10, label %while.body, label %while.end
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while.body: ; preds = %entry, %while.body
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%2 = phi i32 [ %4, %while.body ], [ %1, %entry ]
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%Next.addr.011 = phi %struct.Node* [ %3, %while.body ], [ %Next, %entry ]
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%shl = shl i32 1, %2
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%and = and i32 %shl, %Mask
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%tobool = icmp eq i32 %and, 0
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%Left = getelementptr inbounds %struct.Node, %struct.Node* %Next.addr.011, i64 0, i32 2
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%Right = getelementptr inbounds %struct.Node, %struct.Node* %Next.addr.011, i64 0, i32 1
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%Left.sink = select i1 %tobool, %struct.Node** %Left, %struct.Node** %Right
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%3 = load %struct.Node*, %struct.Node** %Left.sink, align 8
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%Val1 = getelementptr inbounds %struct.Node, %struct.Node* %3, i64 0, i32 0
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%4 = load i32, i32* %Val1, align 8
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%cmp = icmp ugt i32 %2, %4
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br i1 %cmp, label %while.body, label %while.end
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while.end: ; preds = %while.body, %entry
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%.lcssa = phi i32 [ %0, %entry ], [ %2, %while.body ]
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ret i32 %.lcssa
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}
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; The following test checks that x86-cmov-converter optimization transforms
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;; CMOV instructions into branch correctly.
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;;
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;; MBB:
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;; cond = cmp ...
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;; v1 = CMOVgt t1, f1, cond
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;; v2 = CMOVle s1, f2, cond
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;;
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;; Where: t1 = 11, f1 = 22, f2 = a
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;;
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;; After CMOV transformation
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;; -------------------------
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;; MBB:
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;; cond = cmp ...
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;; ja %SinkMBB
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;;
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;; FalseMBB:
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;; jmp %SinkMBB
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;;
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;; SinkMBB:
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;; %v1 = phi[%f1, %FalseMBB], [%t1, %MBB]
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;; %v2 = phi[%f1, %FalseMBB], [%f2, %MBB] ; For CMOV with OppCC switch
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;; ; true-value with false-value
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;; ; Phi instruction cannot use
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;; ; previous Phi instruction result
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; CHECK-LABEL: Transform
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; CHECK-NOT: cmov
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; CHECK: divl [[a:%[0-9a-z]*]]
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; CHECK: movl $11, [[s1:%[0-9a-z]*]]
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; CHECK: movl [[a]], [[s2:%[0-9a-z]*]]
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; CHECK: cmpl [[a]], %edx
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; CHECK: ja [[SinkBB:.*]]
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; CHECK: [[FalseBB:.*]]:
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; CHECK: movl $22, [[s1]]
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; CHECK: movl $22, [[s2]]
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; CHECK: [[SinkBB]]:
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; CHECK: ja
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define void @Transform(i32 *%arr, i32 *%arr2, i32 %a, i32 %b, i32 %c, i32 %n) #0 {
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entry:
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%cmp10 = icmp ugt i32 0, %n
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br i1 %cmp10, label %while.body, label %while.end
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while.body: ; preds = %entry, %while.body
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%i = phi i32 [ %i_inc, %while.body ], [ 0, %entry ]
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%arr_i = getelementptr inbounds i32, i32* %arr, i32 %i
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%x = load i32, i32* %arr_i, align 4
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%div = udiv i32 %x, %a
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%cond = icmp ugt i32 %div, %a
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%condOpp = icmp ule i32 %div, %a
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%s1 = select i1 %cond, i32 11, i32 22
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%s2 = select i1 %condOpp, i32 %s1, i32 %a
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%sum = urem i32 %s1, %s2
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store i32 %sum, i32* %arr_i, align 4
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%i_inc = add i32 %i, 1
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%cmp = icmp ugt i32 %i_inc, %n
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br i1 %cmp, label %while.body, label %while.end
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while.end: ; preds = %while.body, %entry
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ret void
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}
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; Test that we always will convert a cmov with a memory operand into a branch,
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; even outside of a loop.
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define i32 @test_cmov_memoperand(i32 %a, i32 %b, i32 %x, i32* %y) #0 {
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; CHECK-LABEL: test_cmov_memoperand:
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entry:
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%cond = icmp ugt i32 %a, %b
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; CHECK: cmpl
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%load = load i32, i32* %y
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%z = select i1 %cond, i32 %x, i32 %load
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; CHECK-NOT: cmov
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; CHECK: ja [[FALSE_BB:.*]]
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; CHECK: movl (%r{{..}}), %[[R:.*]]
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; CHECK: [[FALSE_BB]]:
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; CHECK: movl %[[R]], %
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ret i32 %z
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}
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; Test that we can convert a group of cmovs where only one has a memory
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; operand.
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define i32 @test_cmov_memoperand_in_group(i32 %a, i32 %b, i32 %x, i32* %y.ptr) #0 {
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; CHECK-LABEL: test_cmov_memoperand_in_group:
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entry:
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%cond = icmp ugt i32 %a, %b
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; CHECK: cmpl
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%y = load i32, i32* %y.ptr
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%z1 = select i1 %cond, i32 %x, i32 %a
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%z2 = select i1 %cond, i32 %x, i32 %y
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%z3 = select i1 %cond, i32 %x, i32 %b
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; CHECK-NOT: cmov
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; CHECK: ja [[FALSE_BB:.*]]
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; CHECK-DAG: movl %{{.*}}, %[[R1:.*]]
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; CHECK-DAG: movl (%r{{..}}), %[[R2:.*]]
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; CHECK-DAG: movl %{{.*}} %[[R3:.*]]
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; CHECK: [[FALSE_BB]]:
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; CHECK: addl
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; CHECK-DAG: %[[R1]]
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; CHECK-DAG: ,
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; CHECK-DAG: %[[R3]]
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; CHECK-DAG: addl
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; CHECK-DAG: %[[R2]]
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; CHECK-DAG: ,
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; CHECK-DAG: %[[R3]]
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; CHECK: movl %[[R3]], %eax
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; CHECK: retq
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%s1 = add i32 %z1, %z2
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%s2 = add i32 %s1, %z3
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ret i32 %s2
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}
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; Same as before but with operands reversed in the select with a load.
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define i32 @test_cmov_memoperand_in_group2(i32 %a, i32 %b, i32 %x, i32* %y.ptr) #0 {
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; CHECK-LABEL: test_cmov_memoperand_in_group2:
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entry:
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%cond = icmp ugt i32 %a, %b
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; CHECK: cmpl
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%y = load i32, i32* %y.ptr
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%z2 = select i1 %cond, i32 %a, i32 %x
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%z1 = select i1 %cond, i32 %y, i32 %x
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%z3 = select i1 %cond, i32 %b, i32 %x
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; CHECK-NOT: cmov
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; CHECK: jbe [[FALSE_BB:.*]]
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; CHECK-DAG: movl %{{.*}}, %[[R1:.*]]
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; CHECK-DAG: movl (%r{{..}}), %[[R2:.*]]
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; CHECK-DAG: movl %{{.*}} %[[R3:.*]]
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; CHECK: [[FALSE_BB]]:
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; CHECK: addl
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; CHECK-DAG: %[[R1]]
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; CHECK-DAG: ,
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; CHECK-DAG: %[[R3]]
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; CHECK-DAG: addl
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; CHECK-DAG: %[[R2]]
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; CHECK-DAG: ,
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; CHECK-DAG: %[[R3]]
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; CHECK: movl %[[R3]], %eax
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; CHECK: retq
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%s1 = add i32 %z1, %z2
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%s2 = add i32 %s1, %z3
|
|
ret i32 %s2
|
|
}
|
|
|
|
; Test that we don't convert a group of cmovs with conflicting directions of
|
|
; loads.
|
|
define i32 @test_cmov_memoperand_conflicting_dir(i32 %a, i32 %b, i32 %x, i32* %y1.ptr, i32* %y2.ptr) #0 {
|
|
; CHECK-LABEL: test_cmov_memoperand_conflicting_dir:
|
|
entry:
|
|
%cond = icmp ugt i32 %a, %b
|
|
; CHECK: cmpl
|
|
%y1 = load i32, i32* %y1.ptr
|
|
%y2 = load i32, i32* %y2.ptr
|
|
%z1 = select i1 %cond, i32 %x, i32 %y1
|
|
%z2 = select i1 %cond, i32 %y2, i32 %x
|
|
; CHECK: cmoval
|
|
; CHECK: cmoval
|
|
%s1 = add i32 %z1, %z2
|
|
ret i32 %s1
|
|
}
|
|
|
|
; Test that we can convert a group of cmovs where only one has a memory
|
|
; operand and where that memory operand's registers come from a prior cmov in
|
|
; the group.
|
|
define i32 @test_cmov_memoperand_in_group_reuse_for_addr(i32 %a, i32 %b, i32* %x, i32* %y) #0 {
|
|
; CHECK-LABEL: test_cmov_memoperand_in_group_reuse_for_addr:
|
|
entry:
|
|
%cond = icmp ugt i32 %a, %b
|
|
; CHECK: cmpl
|
|
%p = select i1 %cond, i32* %x, i32* %y
|
|
%load = load i32, i32* %p
|
|
%z = select i1 %cond, i32 %a, i32 %load
|
|
; CHECK-NOT: cmov
|
|
; CHECK: ja [[FALSE_BB:.*]]
|
|
; CHECK: movl (%r{{..}}), %[[R:.*]]
|
|
; CHECK: [[FALSE_BB]]:
|
|
; CHECK: movl %[[R]], %eax
|
|
; CHECK: retq
|
|
ret i32 %z
|
|
}
|
|
|
|
; Test that we can convert a group of two cmovs with memory operands where one
|
|
; uses the result of the other as part of the address.
|
|
define i32 @test_cmov_memoperand_in_group_reuse_for_addr2(i32 %a, i32 %b, i32* %x, i32** %y) #0 {
|
|
; CHECK-LABEL: test_cmov_memoperand_in_group_reuse_for_addr2:
|
|
entry:
|
|
%cond = icmp ugt i32 %a, %b
|
|
; CHECK: cmpl
|
|
%load1 = load i32*, i32** %y
|
|
%p = select i1 %cond, i32* %x, i32* %load1
|
|
%load2 = load i32, i32* %p
|
|
%z = select i1 %cond, i32 %a, i32 %load2
|
|
; CHECK-NOT: cmov
|
|
; CHECK: ja [[FALSE_BB:.*]]
|
|
; CHECK: movq (%r{{..}}), %[[R1:.*]]
|
|
; CHECK: movl (%[[R1]]), %[[R2:.*]]
|
|
; CHECK: [[FALSE_BB]]:
|
|
; CHECK: movl %[[R2]], %eax
|
|
; CHECK: retq
|
|
ret i32 %z
|
|
}
|
|
|
|
; Test that we can convert a group of cmovs where only one has a memory
|
|
; operand and where that memory operand's registers come from a prior cmov and
|
|
; where that cmov gets *its* input from a prior cmov in the group.
|
|
define i32 @test_cmov_memoperand_in_group_reuse_for_addr3(i32 %a, i32 %b, i32* %x, i32* %y, i32* %z) #0 {
|
|
; CHECK-LABEL: test_cmov_memoperand_in_group_reuse_for_addr3:
|
|
entry:
|
|
%cond = icmp ugt i32 %a, %b
|
|
; CHECK: cmpl
|
|
%p = select i1 %cond, i32* %x, i32* %y
|
|
%p2 = select i1 %cond, i32* %z, i32* %p
|
|
%load = load i32, i32* %p2
|
|
%r = select i1 %cond, i32 %a, i32 %load
|
|
; CHECK-NOT: cmov
|
|
; CHECK: ja [[FALSE_BB:.*]]
|
|
; CHECK: movl (%r{{..}}), %[[R:.*]]
|
|
; CHECK: [[FALSE_BB]]:
|
|
; CHECK: movl %[[R]], %eax
|
|
; CHECK: retq
|
|
ret i32 %r
|
|
}
|
|
|
|
attributes #0 = {"target-cpu"="x86-64"}
|