Simon Pilgrim 9929f90740 [X86][SSE] Reduce FADD/FSUB/FMUL costs on later targets (PR36280) ... Agner's tables indicate that for SSE42+ targets (Core2 and later) we can reduce the FADD/FSUB/FMUL costs down to 1, which should fix the Himeno benchmark. Note: the AVX512 FDIV costs look rather dodgy, but this isn't part of this patch. Differential Revision: https://reviews.llvm.org/D43733 llvm-svn: 326133		2018-02-26 22:10:17 +00:00
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AArch64	Revert r314923: "Recommit : Use the basic cost if a GEP is not used as addressing mode"	2017-10-13 14:04:21 +00:00
AMDGPU	[AMDGPU] Switch to the new addr space mapping by default	2018-02-02 16:07:16 +00:00
ARM	Convert an APInt to int64_t properly in TTI::getGEPCost().	2017-10-04 20:47:33 +00:00
PowerPC	[PPC] Give unaligned memory access lower cost on processor that supports it	2017-02-17 22:29:39 +00:00
SystemZ	[SystemZ] Add support for IBM z14 processor (2/3)	2017-07-17 17:42:48 +00:00
X86	[X86][SSE] Reduce FADD/FSUB/FMUL costs on later targets (PR36280)	2018-02-26 22:10:17 +00:00
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