llvm-project/llvm/lib/CodeGen/MIRParser
Quentin Colombet 2c6469687d [MIR] Check that generic virtual registers get a size.
Without that check it was possible to write test cases where the size
was not specified and we ended up with weird asserts down the road,
because the default value (1) would not make sense.

llvm-svn: 272226
2016-06-08 23:27:46 +00:00
..
CMakeLists.txt MIR Serialization: Introduce a lexer for machine instructions. 2015-06-22 20:37:46 +00:00
LLVMBuild.txt MIRParser/LLVMBuild.txt: Add MC for MCRegisterInfo::getDwarfRegNum(). 2015-07-24 01:12:36 +00:00
MILexer.cpp Remove some unneeded headers and replace some headers with forward class declarations (NFC) 2016-04-16 07:51:28 +00:00
MILexer.h MIRParser: Add %subreg.xxx syntax for subregister index operands 2016-03-28 18:18:46 +00:00
MIParser.cpp [MIR] Check that generic virtual registers get a size. 2016-06-08 23:27:46 +00:00
MIParser.h [MIR] Check that generic virtual registers get a size. 2016-06-08 23:27:46 +00:00
MIRParser.cpp [MIR] Check that generic virtual registers get a size. 2016-06-08 23:27:46 +00:00