llvm-project/llvm/test/MC/Disassembler
Dmitry Preobrazhensky 91f4650ebb [AMDGPU][MC][GFX10] Corrected global_atomic_fcmpswap*
Corrected src data size of global_atomic_fcmpswap and global_atomic_fcmpswap_x2 opcodes.

Differential Revision: https://reviews.llvm.org/D113746
2021-11-15 12:51:12 +03:00
..
AArch64 [AArch64] Add support for the 'R' architecture profile. 2021-10-27 12:32:30 +01:00
AMDGPU [AMDGPU][MC][GFX10] Corrected global_atomic_fcmpswap* 2021-11-15 12:51:12 +03:00
ARC [ARC] Add ADC (addition with carry) and SBC (subtraction with carry) instructions 2021-08-25 07:46:15 -07:00
ARM [ARMInstPrinter] Print the target address of a branch instruction 2021-06-30 16:35:28 +07:00
Hexagon
Lanai
M68k [M68k] Update disassembler test case following up ADD / ADDA changes 2021-08-08 14:20:46 -07:00
MSP430
Mips [mips] Add tests to check disassembling of add.ps/mul.ps/sub.ps instructions 2020-11-13 14:31:12 +03:00
PowerPC [PowerPC]Add addex instruction definition and MC tests 2021-07-26 14:55:38 -05:00
RISCV [RISCV] Add support for printing pcrel immediates as absolute addresses in llvm-objdump 2020-12-04 10:34:12 -08:00
Sparc
SystemZ [SystemZ] Add support for new cpu architecture - arch14 2021-07-26 16:57:28 +02:00
WebAssembly [WebAssembly] Update v128.any_true 2021-04-11 11:13:16 -07:00
X86 [X86] AVX512FP16 instructions enabling 6/6 2021-08-30 13:08:45 +08:00
XCore