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AArch64
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[GlobalISel][AArch64][AMDGPU][X86] Teach LegalizationArtifactCombiner to combine trunc(g_constant).
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2019-10-24 12:59:26 -07:00 |
AMDGPU
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[AMDGPU] Disallow dpp combining for dpp instructions without Src2 operand (when Src2 is required)
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2019-10-25 21:30:37 +03:00 |
ARC
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ARM
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Revert 4334892e7b "[DAGCombine][ARM] x ==/!= c -> (x - c) ==/!= 0 iff '-c' can be folded into the x node."
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2019-10-23 19:52:02 +02:00 |
AVR
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…
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BPF
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[BPF] fix indirect call assembly code
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2019-10-21 03:22:03 +00:00 |
Generic
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Reapply r374743 with a fix for the ocaml binding
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2019-10-14 16:15:14 +00:00 |
Hexagon
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[DFAPacketizer] Use DFAEmitter. NFC.
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2019-10-17 08:34:29 +00:00 |
Inputs
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Lanai
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
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2019-09-11 11:16:48 +00:00 |
MIR
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[MIParser] Set RegClassOrRegBank during instruction parsing
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2019-10-22 14:25:37 +00:00 |
MSP430
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[TargetLowering][DAGCombine][MSP430] add/use hook for Shift Amount Threshold (1/2)
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2019-10-19 16:57:02 +00:00 |
Mips
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[MIPS GlobalISel] Select MSA vector generic and builtin fsqrt
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2019-10-25 14:45:14 +02:00 |
NVPTX
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[NVPTX] Restructure shfl instrinsics and add variants that return a predicate.
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2019-10-14 16:53:34 +00:00 |
PowerPC
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[DAGCombiner] widen zext of popcount based on target support
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2019-10-25 14:10:51 -04:00 |
RISCV
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[RISCV] Add support for half-precision floats
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2019-10-25 14:02:02 +01:00 |
SPARC
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SystemZ
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[FPEnv] Strict FP tests should use the requisite function attributes.
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2019-10-04 17:03:46 +00:00 |
Thumb
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(Re)generate various tests. NFC
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2019-10-08 16:16:26 +00:00 |
Thumb2
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[InstCombine] Known-bits optimization for ARM MVE VADC.
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2019-10-24 16:33:13 +01:00 |
WebAssembly
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[WebAssembly] Allow multivalue signatures in object files
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2019-10-18 20:27:30 +00:00 |
WinCFGuard
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WinEH
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[Windows] Replace TrapUnreachable with an int3 insertion pass
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2019-09-09 23:04:25 +00:00 |
X86
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Add an instruction marker field to the ExtraInfo in MachineInstrs.
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2019-10-25 09:21:10 -07:00 |
XCore
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