llvm-project/llvm/test/CodeGen
vpykhtin c9c18e5a31 [AMDGPU] Disallow dpp combining for dpp instructions without Src2 operand (when Src2 is required)
Differential revision: https://reviews.llvm.org/D69430
2019-10-25 21:30:37 +03:00
..
AArch64 [GlobalISel][AArch64][AMDGPU][X86] Teach LegalizationArtifactCombiner to combine trunc(g_constant). 2019-10-24 12:59:26 -07:00
AMDGPU [AMDGPU] Disallow dpp combining for dpp instructions without Src2 operand (when Src2 is required) 2019-10-25 21:30:37 +03:00
ARC
ARM Revert 4334892e7b "[DAGCombine][ARM] x ==/!= c -> (x - c) ==/!= 0 iff '-c' can be folded into the x node." 2019-10-23 19:52:02 +02:00
AVR
BPF [BPF] fix indirect call assembly code 2019-10-21 03:22:03 +00:00
Generic Reapply r374743 with a fix for the ocaml binding 2019-10-14 16:15:14 +00:00
Hexagon [DFAPacketizer] Use DFAEmitter. NFC. 2019-10-17 08:34:29 +00:00
Inputs
Lanai [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
MIR [MIParser] Set RegClassOrRegBank during instruction parsing 2019-10-22 14:25:37 +00:00
MSP430 [TargetLowering][DAGCombine][MSP430] add/use hook for Shift Amount Threshold (1/2) 2019-10-19 16:57:02 +00:00
Mips [MIPS GlobalISel] Select MSA vector generic and builtin fsqrt 2019-10-25 14:45:14 +02:00
NVPTX [NVPTX] Restructure shfl instrinsics and add variants that return a predicate. 2019-10-14 16:53:34 +00:00
PowerPC [DAGCombiner] widen zext of popcount based on target support 2019-10-25 14:10:51 -04:00
RISCV [RISCV] Add support for half-precision floats 2019-10-25 14:02:02 +01:00
SPARC
SystemZ [FPEnv] Strict FP tests should use the requisite function attributes. 2019-10-04 17:03:46 +00:00
Thumb (Re)generate various tests. NFC 2019-10-08 16:16:26 +00:00
Thumb2 [InstCombine] Known-bits optimization for ARM MVE VADC. 2019-10-24 16:33:13 +01:00
WebAssembly [WebAssembly] Allow multivalue signatures in object files 2019-10-18 20:27:30 +00:00
WinCFGuard
WinEH [Windows] Replace TrapUnreachable with an int3 insertion pass 2019-09-09 23:04:25 +00:00
X86 Add an instruction marker field to the ExtraInfo in MachineInstrs. 2019-10-25 09:21:10 -07:00
XCore