Alex Bradbury 6758ecb98c [RISCV] Add support for all RV32I instructions ... This patch supports all RV32I instructions as described in the RISC-V manual. A future patch will add support for pseudoinstructions and other instruction expansions (e.g. 0-arg fence -> fence iorw, iorw). Differential Revision: https://reviews.llvm.org/D23566 llvm-svn: 313485		2017-09-17 14:27:35 +00:00
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CMakeLists.txt	…
LLVMBuild.txt	…
RISCVAsmParser.cpp	[RISCV] Add support for all RV32I instructions	2017-09-17 14:27:35 +00:00