llvm-project/llvm/lib/Target/AArch64
Eli Friedman be944c85f3 [AArch64][SVE] Add patterns for integer mla/mls.
We probably want to introduce pseudo-instructions at some point, like
we have for binary operations, but this seems okay for now.

One thing I'm not sure about is whether we should be doing this as a
DAGCombine instead of directly pattern-matching it. I don't see any big
downside to doing it this way, though.

Differential Revision: https://reviews.llvm.org/D85681
2020-08-18 12:51:16 -07:00
..
AsmParser [X86][MC][Target] Initial backend support a tune CPU to support -mtune 2020-08-14 15:31:50 -07:00
Disassembler [AArch64] Emit warning when disassembling unpredictable LDRAA and LDRAB 2020-06-25 15:56:36 +01:00
GISel AArch64/GlobalISel: Fix verifier error after selecting returnaddress 2020-08-06 13:18:05 -04:00
MCTargetDesc [X86][MC][Target] Initial backend support a tune CPU to support -mtune 2020-08-14 15:31:50 -07:00
TargetInfo CMake: Make most target symbols hidden by default 2020-01-14 19:46:52 -08:00
Utils [ARM, AArch64] Fix a comment typo. NFC. 2020-08-06 09:23:45 +03:00
AArch64.h [AArch64] Extend AArch64SLSHardeningPass to harden BLR instructions. 2020-06-12 07:34:33 +01:00
AArch64.td [ARM] Add Cortex-A78 and Cortex-X1 Support for Clang and LLVM 2020-07-10 18:24:11 +01:00
AArch64A53Fix835769.cpp
AArch64A57FPLoadBalancing.cpp
AArch64AdvSIMDScalarPass.cpp
AArch64AsmPrinter.cpp [DebugInfo] Update MachineInstr to help support variadic DBG_VALUE instructions 2020-06-22 16:01:12 +01:00
AArch64BranchTargets.cpp [AArch64] Fix BTI instruction emission. 2020-06-15 15:04:36 +02:00
AArch64CallingConvention.cpp [Alignment][NFC] Use Align for TargetCallingConv::OrigAlign 2020-06-25 13:21:22 +00:00
AArch64CallingConvention.h
AArch64CallingConvention.td [Alignment][NFC] Use Align for TargetCallingConv::OrigAlign 2020-06-25 13:21:22 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp [CallSiteInfo] Handle bundles when updating call site info 2020-02-27 13:57:06 +01:00
AArch64CollectLOH.cpp [AArch64] Fix CollectLOH creating an AdrpAdd LOH when there's a live used reg 2020-06-01 16:00:55 -07:00
AArch64Combine.td [GlobalISel] Enable copy-propagation in post-legalizer combiner. 2020-08-15 13:44:30 -07:00
AArch64CompressJumpTables.cpp [Alignment][NFC] Deprecate Align::None() 2020-01-24 12:53:58 +01:00
AArch64CondBrTuning.cpp [AArch64CondBrTuning] Ignore debug insts when scanning for NZCV clobbers [10/14] 2020-04-22 17:03:40 -07:00
AArch64ConditionOptimizer.cpp MachineBasicBlock::updateTerminator now requires an explicit layout successor. 2020-06-06 22:30:51 -04:00
AArch64ConditionalCompares.cpp DomTree: Remove getChildren() accessor 2020-07-06 21:58:11 +02:00
AArch64DeadRegisterDefinitionsPass.cpp
AArch64ExpandImm.cpp
AArch64ExpandImm.h
AArch64ExpandPseudoInsts.cpp [SVE] Fix invalid assert in expand_DestructiveOp. 2020-07-04 09:21:40 +00:00
AArch64FalkorHWPFFix.cpp Prefix some AArch64/ARM passes with "aarch64-"/"arm-" 2020-07-27 11:00:39 -07:00
AArch64FastISel.cpp AArch64: emit @llvm.debugtrap as `brk #0xf000` on all platforms 2020-07-20 10:31:26 +01:00
AArch64FrameLowering.cpp Fix -Wconstant-conversion warning with explicit cast 2020-08-04 10:41:27 -07:00
AArch64FrameLowering.h [AArch64][SVE] Add missing unwind info for SVE registers. 2020-08-04 11:47:06 +01:00
AArch64GenRegisterBankInfo.def
AArch64ISelDAGToDAG.cpp [SVE] Fix shift-by-imm patterns used by asr, lsl & lsr intrinsics. 2020-08-18 11:41:26 +01:00
AArch64ISelLowering.cpp [AArch64][SVE] Allow llvm.aarch64.sve.st2/3/4 with vectors of pointers. 2020-08-18 12:51:16 -07:00
AArch64ISelLowering.h [SVE] Lower fixed length vector integer ISD::SETCC operations. 2020-08-13 12:01:56 +01:00
AArch64InstrAtomics.td DAG: Use TargetConstant for FENCE operands 2020-01-02 17:16:10 -05:00
AArch64InstrFormats.td [AArch64] Fix operand definitions of XPACI/XPACD 2020-07-30 15:31:44 +01:00
AArch64InstrGISel.td [AArch64][GlobalISel] Add G_EXT and select ext using it 2020-06-15 12:20:59 -07:00
AArch64InstrInfo.cpp [MachineOutliner][AArch64] WA for multiple stack fixup cases in MachineOutliner. 2020-08-10 15:43:30 -04:00
AArch64InstrInfo.h [AArch64][SVE] NFC: Rename isOrig -> isReverseInstr 2020-07-02 17:01:15 +01:00
AArch64InstrInfo.td [AArch64] Add missing isel patterns for fcvtzs/u intrinsic on v1f64. 2020-08-03 13:04:59 -07:00
AArch64LoadStoreOptimizer.cpp [AArch64] Fix ldst-opt of multiple disjunct subregs. 2020-06-08 20:18:24 +01:00
AArch64MCInstLower.cpp
AArch64MCInstLower.h
AArch64MachineFunctionInfo.cpp MachineFunctionInfo for AArch64 in MIR 2020-04-17 15:16:59 -07:00
AArch64MachineFunctionInfo.h [MachineOutliner] Annotation for outlined functions in AArch64 2020-04-20 13:33:31 -07:00
AArch64MacroFusion.cpp
AArch64MacroFusion.h
AArch64PBQPRegAlloc.cpp
AArch64PBQPRegAlloc.h
AArch64PerfectShuffle.h
AArch64PfmCounters.td
AArch64PromoteConstant.cpp [AArch64] Don't promote constants with float ConstantExpr. 2020-05-13 23:31:47 +01:00
AArch64RedundantCopyElimination.cpp
AArch64RegisterBanks.td
AArch64RegisterInfo.cpp [AArch64RegisterInfo] Supress new warning 2020-08-08 21:47:01 +02:00
AArch64RegisterInfo.h [AArch64][SVE] Disable tail calls if callee does not preserve SVE regs. 2020-08-05 09:38:54 +01:00
AArch64RegisterInfo.td [AArch64][SVE] Fix CFA calculation in presence of SVE objects. 2020-08-04 11:47:06 +01:00
AArch64SIMDInstrOpt.cpp Make llvm::StringRef to std::string conversions explicit. 2020-01-28 23:25:25 +01:00
AArch64SLSHardening.cpp [NFC] Clean up uses of MachineModuleInfoWrapperPass 2020-07-01 09:45:05 -07:00
AArch64SVEInstrInfo.td [AArch64][SVE] Add patterns for integer mla/mls. 2020-08-18 12:51:16 -07:00
AArch64SchedA53.td [AARch64] Add Marvell ThunderX3T110 support 2020-05-13 16:58:51 -07:00
AArch64SchedA57.td [AARch64] Add Marvell ThunderX3T110 support 2020-05-13 16:58:51 -07:00
AArch64SchedA57WriteRes.td
AArch64SchedCyclone.td [AARch64] Add Marvell ThunderX3T110 support 2020-05-13 16:58:51 -07:00
AArch64SchedExynosM3.td [AARch64] Add Marvell ThunderX3T110 support 2020-05-13 16:58:51 -07:00
AArch64SchedExynosM4.td [AARch64] Add Marvell ThunderX3T110 support 2020-05-13 16:58:51 -07:00
AArch64SchedExynosM5.td [AARch64] Add Marvell ThunderX3T110 support 2020-05-13 16:58:51 -07:00
AArch64SchedFalkor.td [AARch64] Add Marvell ThunderX3T110 support 2020-05-13 16:58:51 -07:00
AArch64SchedFalkorDetails.td [AArch64] Add BIT/BIF support. 2020-02-14 14:19:39 +00:00
AArch64SchedKryo.td [AARch64] Add Marvell ThunderX3T110 support 2020-05-13 16:58:51 -07:00
AArch64SchedKryoDetails.td [AArch64] Add BIT/BIF support. 2020-02-14 14:19:39 +00:00
AArch64SchedPredExynos.td
AArch64SchedPredicates.td
AArch64SchedThunderX.td [AARch64] Add Marvell ThunderX3T110 support 2020-05-13 16:58:51 -07:00
AArch64SchedThunderX2T99.td [AARch64] Add Marvell ThunderX3T110 support 2020-05-13 16:58:51 -07:00
AArch64SchedThunderX3T110.td [AARch64] Add Marvell ThunderX3T110 support 2020-05-13 16:58:51 -07:00
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp [CodeGen] Refactor getMemBasePlusOffset & getObjectPtrOffset to accept a TypeSize 2020-08-11 12:17:10 +01:00
AArch64SelectionDAGInfo.h [Alignment][NFC] Migrate SelectionDAGTargetInfo::EmitTargetCodeForMemset to Align 2020-06-30 12:46:26 +00:00
AArch64SpeculationHardening.cpp
AArch64StackOffset.h [AArch64][SVE] Fix CFA calculation in presence of SVE objects. 2020-08-04 11:47:06 +01:00
AArch64StackTagging.cpp [ValueTracking] Remove AllocaForValue parameter 2020-07-30 18:48:34 -07:00
AArch64StackTaggingPreRA.cpp
AArch64StorePairSuppress.cpp Add OffsetIsScalable to getMemOperandWithOffset 2020-02-18 15:53:29 +00:00
AArch64Subtarget.cpp [X86][MC][Target] Initial backend support a tune CPU to support -mtune 2020-08-14 15:31:50 -07:00
AArch64Subtarget.h [X86][MC][Target] Initial backend support a tune CPU to support -mtune 2020-08-14 15:31:50 -07:00
AArch64SystemOperands.td [AArch64] Remove inexistent system register ERXTS_EL1 2020-04-29 16:43:48 +01:00
AArch64TargetMachine.cpp [SimplifyCFG][LoopRotate] SimplifyCFG: disable common instruction hoisting by default, enable late in pipeline 2020-07-29 20:05:30 +03:00
AArch64TargetMachine.h Support addrspacecast initializers with isNoopAddrSpaceCast 2020-07-31 10:42:43 -04:00
AArch64TargetObjectFile.cpp [X86] Reland D71360 Clean up UseInitArray initialization for X86ELFTargetObjectFile 2020-03-20 21:57:34 -07:00
AArch64TargetObjectFile.h [llvm][ELF][AArch64] Handle R_AARCH64_PLT32 relocation 2020-06-10 11:34:16 -07:00
AArch64TargetTransformInfo.cpp [Analysis] TTI: Add CastContextHint for getCastInstrCost 2020-07-29 13:32:53 +01:00
AArch64TargetTransformInfo.h [AArch64][SVE] Allow vector of pointers as legal type for masked load/store. 2020-07-31 17:30:23 -07:00
CMakeLists.txt [AArch64] Introduce AArch64SLSHardeningPass, implementing hardening of RET and BR instructions. 2020-06-11 07:51:17 +01:00
LLVMBuild.txt
SVEInstrFormats.td [AArch64][SVE] Add patterns for integer mla/mls. 2020-08-18 12:51:16 -07:00
SVEIntrinsicOpts.cpp [SVE] Fix bug in SVEIntrinsicOpts::optimizePTest 2020-08-14 07:57:21 +01:00