llvm-project/llvm
Amaury Séchet d1baed7c9c [DAG] select Cond, -1, C --> or (sext Cond), C if Cond is MVT::i1
This seems to be beneficial overall, except for midpoint-int.ll .

The X86 backend seems to generate zeroing that are not necesary.

Reviewed By: shchenz

Differential Revision: https://reviews.llvm.org/D131260
2022-09-27 12:54:52 +00:00
..
benchmarks
bindings [NFC][2/n] Remove PrunePH pass 2022-09-26 18:38:04 -07:00
cmake Fix Z3 version detection regexp 2022-09-23 16:24:51 -03:00
docs [ADT] Add IntervalTree - light tree data structure to hold intervals. 2022-09-27 08:22:28 +01:00
examples
include [AArch64] Add all predecessor archs in target info 2022-09-27 10:23:21 +02:00
lib [DAG] select Cond, -1, C --> or (sext Cond), C if Cond is MVT::i1 2022-09-27 12:54:52 +00:00
projects
resources
runtimes [NFC] Fix typo in comment 2022-09-20 17:22:08 -04:00
test [DAG] select Cond, -1, C --> or (sext Cond), C if Cond is MVT::i1 2022-09-27 12:54:52 +00:00
tools [llvm-readobj][COFF] Print forwarder export symbols correctly 2022-09-26 11:05:41 +03:00
unittests [ADT] Add IntervalTree - light tree data structure to hold intervals. 2022-09-27 12:48:44 +01:00
utils [gn build] Port 6584d1f930 2022-09-27 07:24:34 +00:00
.clang-format
.clang-tidy
.gitattributes
.gitignore
CMakeLists.txt [NFC] Remove trailing whitespace in CMake file 2022-09-22 16:15:46 -04:00
CODE_OWNERS.TXT
CREDITS.TXT
LICENSE.TXT
README.txt
RELEASE_TESTERS.TXT
configure
llvm.spec.in

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