forked from OSchip/llvm-project
86 lines
2.3 KiB
LLVM
86 lines
2.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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define i64 @test1(i32 %x) nounwind {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: ret i64 0
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;
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%y = lshr i32 %x, 1
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%r = udiv i32 %y, -1
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%z = sext i32 %r to i64
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ret i64 %z
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}
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define i64 @test2(i32 %x) nounwind {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: ret i64 0
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;
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%y = lshr i32 %x, 31
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%r = udiv i32 %y, 3
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%z = sext i32 %r to i64
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ret i64 %z
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}
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; The udiv instructions shouldn't be optimized away, and the
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; sext instructions should be optimized to zext.
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define i64 @test1_PR2274(i32 %x, i32 %g) nounwind {
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; CHECK-LABEL: @test1_PR2274(
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; CHECK-NEXT: [[Y:%.*]] = lshr i32 [[X:%.*]], 30
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; CHECK-NEXT: [[R:%.*]] = udiv i32 [[Y]], [[G:%.*]]
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; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[R]] to i64
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; CHECK-NEXT: ret i64 [[TMP1]]
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;
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%y = lshr i32 %x, 30
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%r = udiv i32 %y, %g
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%z = sext i32 %r to i64
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ret i64 %z
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}
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define i64 @test2_PR2274(i32 %x, i32 %v) nounwind {
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; CHECK-LABEL: @test2_PR2274(
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; CHECK-NEXT: [[Y:%.*]] = lshr i32 [[X:%.*]], 31
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; CHECK-NEXT: [[R:%.*]] = udiv i32 [[Y]], [[V:%.*]]
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; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[R]] to i64
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; CHECK-NEXT: ret i64 [[TMP1]]
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;
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%y = lshr i32 %x, 31
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%r = udiv i32 %y, %v
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%z = sext i32 %r to i64
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ret i64 %z
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}
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; The udiv should be simplified according to the rule:
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; X udiv (C1 << N), where C1 is `1<<C2` --> X >> (N+C2)
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@b = external global [1 x i16]
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define i32 @PR30366(i1 %a) {
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; CHECK-LABEL: @PR30366(
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; CHECK-NEXT: [[Z:%.*]] = zext i1 [[A:%.*]] to i32
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; CHECK-NEXT: [[D:%.*]] = lshr i32 [[Z]], zext (i16 ptrtoint ([1 x i16]* @b to i16) to i32)
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; CHECK-NEXT: ret i32 [[D]]
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;
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%z = zext i1 %a to i32
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%d = udiv i32 %z, zext (i16 shl (i16 1, i16 ptrtoint ([1 x i16]* @b to i16)) to i32)
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ret i32 %d
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}
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; OSS-Fuzz #4857
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; https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=4857
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define i177 @ossfuzz_4857(i177 %X, i177 %Y) {
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; CHECK-LABEL: @ossfuzz_4857(
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; CHECK-NEXT: store i1 false, i1* undef, align 1
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; CHECK-NEXT: ret i177 0
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;
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%B5 = udiv i177 %Y, -1
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%B4 = add i177 %B5, -1
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%B2 = add i177 %B4, -1
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%B6 = mul i177 %B5, %B2
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%B3 = add i177 %B2, %B2
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%B9 = xor i177 %B4, %B3
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%B13 = ashr i177 %Y, %B2
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%B22 = add i177 %B9, %B13
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%B1 = udiv i177 %B5, %B6
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%C9 = icmp ult i177 %Y, %B22
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store i1 %C9, i1* undef
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ret i177 %B1
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}
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