.. |
AArch64
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[AArch64][SVE] Asm: Support for contiguous LD1 (scalar+scalar) load instructions.
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2018-04-20 12:52:01 +00:00 |
AMDGPU
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[AMDGPU][MC][VI][GFX9] Added support of SDWA/DPP for v_cndmask_b32
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2018-04-16 12:41:38 +00:00 |
ARM
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[ARM] Do not convert some vmov instructions
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2018-04-04 08:54:19 +00:00 |
AVR
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[AVR] Implement some missing code paths
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2017-12-11 11:01:27 +00:00 |
AsmParser
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[llvm-mc] Make error handling more consistent.
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2018-04-22 08:01:35 +00:00 |
BPF
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bpf: New disassembler testcases for 32-bit subregister support
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2018-02-23 23:49:35 +00:00 |
COFF
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[IR] Avoid the need to prefix MS C++ symbols with '\01'
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2018-03-16 20:13:32 +00:00 |
Disassembler
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[X86] WaitPKG instructions
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2018-04-20 18:42:47 +00:00 |
ELF
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[test] Fix MC/ELF/nocompression.s
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2018-04-22 08:46:27 +00:00 |
Hexagon
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[Hexagon] Recognize and handle :endloop01
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2018-03-30 15:29:47 +00:00 |
Lanai
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[lanai] Add more tests for assembly of conditional ALU ops
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2016-07-11 17:58:16 +00:00 |
MachO
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MachO: trap unreachable instructions
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2018-04-13 22:25:20 +00:00 |
Mips
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[mips] Guard some macro expansions properly
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2018-04-19 09:45:04 +00:00 |
PowerPC
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[PowerPC] Code cleanup. Remove instructions that were withdrawn from Power 9.
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2018-02-23 15:55:16 +00:00 |
RISCV
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Revert "[RISCV] implement li pseudo instruction"
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2018-04-18 19:02:31 +00:00 |
Sparc
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[Sparc] invalid adjustments in TLS_LE/TLS_LDO relocations removed
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2017-07-25 15:28:28 +00:00 |
SystemZ
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[SystemZ, AsmParser] Enable the mnemonic spell corrector.
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2017-07-18 09:17:00 +00:00 |
WebAssembly
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[WebAssembly] Enabled -triple=wasm32-unknown-unknown-wasm path using ELF directive parser.
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2018-04-19 22:00:53 +00:00 |
X86
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[X86] Remove DATA32_PREFIX. Hack the printing for DATA16_PREFIX to print 'data32' in 16-bit mode. Hack the asm parser to convert 'data32' to 'data16' in 16-bit mode.
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2018-04-22 00:52:02 +00:00 |