forked from OSchip/llvm-project
52 lines
1.5 KiB
TableGen
52 lines
1.5 KiB
TableGen
//===-- PTXInstrFormats.td - PTX Instruction Formats -------*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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// Rounding Mode Specifier
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/*class RoundingMode<bits<3> val> {
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bits<3> Value = val;
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}
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def RndDefault : RoundingMode<0>;
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def RndNearestEven : RoundingMode<1>;
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def RndNearestZero : RoundingMode<2>;
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def RndNegInf : RoundingMode<3>;
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def RndPosInf : RoundingMode<4>;
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def RndApprox : RoundingMode<5>;*/
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// Rounding Mode Operand
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def RndMode : Operand<i32> {
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let PrintMethod = "printRoundingMode";
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}
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def RndDefault : PatLeaf<(i32 0)>;
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// PTX Predicate operand, default to (0, 0) = (zero-reg, none).
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// Leave PrintMethod empty; predicate printing is defined elsewhere.
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def pred : PredicateOperand<OtherVT, (ops RegPred, i32imm),
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(ops (i1 zero_reg), (i32 2))>;
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def RndModeOperand : Operand<OtherVT> {
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let MIOperandInfo = (ops i32imm);
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}
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// Instruction Types
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let Namespace = "PTX" in {
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class InstPTX<dag oops, dag iops, string asmstr, list<dag> pattern>
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: Instruction {
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dag OutOperandList = oops;
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dag InOperandList = !con(iops, (ins pred:$_p));
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let AsmString = asmstr; // Predicate printing is defined elsewhere.
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let Pattern = pattern;
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let isPredicable = 1;
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}
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}
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