forked from OSchip/llvm-project
96 lines
3.2 KiB
C++
96 lines
3.2 KiB
C++
//===-- NVPTXMCTargetDesc.cpp - NVPTX Target Descriptions -------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides NVPTX specific target descriptions.
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//
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//===----------------------------------------------------------------------===//
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#include "NVPTXMCTargetDesc.h"
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#include "InstPrinter/NVPTXInstPrinter.h"
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#include "NVPTXMCAsmInfo.h"
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#include "llvm/MC/MCCodeGenInfo.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/Support/TargetRegistry.h"
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using namespace llvm;
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#define GET_INSTRINFO_MC_DESC
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#include "NVPTXGenInstrInfo.inc"
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#define GET_SUBTARGETINFO_MC_DESC
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#include "NVPTXGenSubtargetInfo.inc"
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#define GET_REGINFO_MC_DESC
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#include "NVPTXGenRegisterInfo.inc"
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static MCInstrInfo *createNVPTXMCInstrInfo() {
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MCInstrInfo *X = new MCInstrInfo();
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InitNVPTXMCInstrInfo(X);
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return X;
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}
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static MCRegisterInfo *createNVPTXMCRegisterInfo(const Triple &TT) {
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MCRegisterInfo *X = new MCRegisterInfo();
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// PTX does not have a return address register.
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InitNVPTXMCRegisterInfo(X, 0);
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return X;
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}
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static MCSubtargetInfo *
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createNVPTXMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) {
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return createNVPTXMCSubtargetInfoImpl(TT, CPU, FS);
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}
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static MCCodeGenInfo *createNVPTXMCCodeGenInfo(const Triple &TT,
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Reloc::Model RM,
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CodeModel::Model CM,
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CodeGenOpt::Level OL) {
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MCCodeGenInfo *X = new MCCodeGenInfo();
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// The default relocation model is used regardless of what the client has
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// specified, as it is the only relocation model currently supported.
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X->initMCCodeGenInfo(Reloc::Default, CM, OL);
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return X;
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}
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static MCInstPrinter *createNVPTXMCInstPrinter(const Triple &T,
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unsigned SyntaxVariant,
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const MCAsmInfo &MAI,
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const MCInstrInfo &MII,
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const MCRegisterInfo &MRI) {
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if (SyntaxVariant == 0)
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return new NVPTXInstPrinter(MAI, MII, MRI);
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return nullptr;
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}
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// Force static initialization.
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extern "C" void LLVMInitializeNVPTXTargetMC() {
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for (Target *T : {&TheNVPTXTarget32, &TheNVPTXTarget64}) {
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// Register the MC asm info.
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RegisterMCAsmInfo<NVPTXMCAsmInfo> X(*T);
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// Register the MC codegen info.
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TargetRegistry::RegisterMCCodeGenInfo(*T, createNVPTXMCCodeGenInfo);
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// Register the MC instruction info.
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TargetRegistry::RegisterMCInstrInfo(*T, createNVPTXMCInstrInfo);
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// Register the MC register info.
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TargetRegistry::RegisterMCRegInfo(*T, createNVPTXMCRegisterInfo);
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// Register the MC subtarget info.
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TargetRegistry::RegisterMCSubtargetInfo(*T, createNVPTXMCSubtargetInfo);
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// Register the MCInstPrinter.
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TargetRegistry::RegisterMCInstPrinter(*T, createNVPTXMCInstPrinter);
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}
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}
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