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Kristof Beyls af9814a1fc [GlobalISel] Enable legalizing non-power-of-2 sized types. 
This changes the interface of how targets describe how to legalize, see
the below description.

1. Interface for targets to describe how to legalize.

In GlobalISel, the API in the LegalizerInfo class is the main interface
for targets to specify which types are legal for which operations, and
what to do to turn illegal type/operation combinations into legal ones.

For each operation the type sizes that can be legalized without having
to change the size of the type are specified with a call to setAction.
This isn't different to how GlobalISel worked before. For example, for a
target that supports 32 and 64 bit adds natively:

  for (auto Ty : {s32, s64})
    setAction({G_ADD, 0, s32}, Legal);

or for a target that needs a library call for a 32 bit division:

  setAction({G_SDIV, s32}, Libcall);

The main conceptual change to the LegalizerInfo API, is in specifying
how to legalize the type sizes for which a change of size is needed. For
example, in the above example, how to specify how all types from i1 to
i8388607 (apart from s32 and s64 which are legal) need to be legalized
and expressed in terms of operations on the available legal sizes
(again, i32 and i64 in this case). Before, the implementation only
allowed specifying power-of-2-sized types (e.g. setAction({G_ADD, 0,
s128}, NarrowScalar).  A worse limitation was that if you'd wanted to
specify how to legalize all the sized types as allowed by the LLVM-IR
LangRef, i1 to i8388607, you'd have to call setAction 8388607-3 times
and probably would need a lot of memory to store all of these
specifications.

Instead, the legalization actions that need to change the size of the
type are specified now using a "SizeChangeStrategy".  For example:

   setLegalizeScalarToDifferentSizeStrategy(
       G_ADD, 0, widenToLargerAndNarrowToLargest);

This example indicates that for type sizes for which there is a larger
size that can be legalized towards, do it by Widening the size.
For example, G_ADD on s17 will be legalized by first doing WidenScalar
to make it s32, after which it's legal.
The "NarrowToLargest" indicates what to do if there is no larger size
that can be legalized towards. E.g. G_ADD on s92 will be legalized by
doing NarrowScalar to s64.

Another example, taken from the ARM backend is:
   for (unsigned Op : {G_SDIV, G_UDIV}) {
     setLegalizeScalarToDifferentSizeStrategy(Op, 0,
         widenToLargerTypesUnsupportedOtherwise);
     if (ST.hasDivideInARMMode())
       setAction({Op, s32}, Legal);
     else
       setAction({Op, s32}, Libcall);
   }

For this example, G_SDIV on s8, on a target without a divide
instruction, would be legalized by first doing action (WidenScalar,
s32), followed by (Libcall, s32).

The same principle is also followed for when the number of vector lanes
on vector data types need to be changed, e.g.:

   setAction({G_ADD, LLT::vector(8, 8)}, LegalizerInfo::Legal);
   setAction({G_ADD, LLT::vector(16, 8)}, LegalizerInfo::Legal);
   setAction({G_ADD, LLT::vector(4, 16)}, LegalizerInfo::Legal);
   setAction({G_ADD, LLT::vector(8, 16)}, LegalizerInfo::Legal);
   setAction({G_ADD, LLT::vector(2, 32)}, LegalizerInfo::Legal);
   setAction({G_ADD, LLT::vector(4, 32)}, LegalizerInfo::Legal);
   setLegalizeVectorElementToDifferentSizeStrategy(
       G_ADD, 0, widenToLargerTypesUnsupportedOtherwise);

As currently implemented here, vector types are legalized by first
making the vector element size legal, followed by then making the number
of lanes legal. The strategy to follow in the first step is set by a
call to setLegalizeVectorElementToDifferentSizeStrategy, see example
above.  The strategy followed in the second step
"moreToWiderTypesAndLessToWidest" (see code for its definition),
indicating that vectors are widened to more elements so they map to
natively supported vector widths, or when there isn't a legal wider
vector, split the vector to map it to the widest vector supported.

Therefore, for the above specification, some example legalizations are:
  * getAction({G_ADD, LLT::vector(3, 3)})
    returns {WidenScalar, LLT::vector(3, 8)}
  * getAction({G_ADD, LLT::vector(3, 8)})
    then returns {MoreElements, LLT::vector(8, 8)}
  * getAction({G_ADD, LLT::vector(20, 8)})
    returns {FewerElements, LLT::vector(16, 8)}


2. Key implementation aspects.

How to legalize a specific (operation, type index, size) tuple is
represented by mapping intervals of integers representing a range of
size types to an action to take, e.g.:

       setScalarAction({G_ADD, LLT:scalar(1)},
                       {{1, WidenScalar},  // bit sizes [ 1, 31[
                        {32, Legal},       // bit sizes [32, 33[
                        {33, WidenScalar}, // bit sizes [33, 64[
                        {64, Legal},       // bit sizes [64, 65[
                        {65, NarrowScalar} // bit sizes [65, +inf[
                       });

Please note that most of the code to do the actual lowering of
non-power-of-2 sized types is currently missing, this is just trying to
make it possible for targets to specify what is legal, and how non-legal
types should be legalized.  Probably quite a bit of further work is
needed in the actual legalizing and the other passes in GlobalISel to
support non-power-of-2 sized types.

I hope the documentation in LegalizerInfo.h and the examples provided in the
various {Target}LegalizerInfo.cpp and LegalizerInfoTest.cpp explains well
enough how this is meant to be used.

This drops the need for LLT::{half,double}...Size().


Differential Revision: https://reviews.llvm.org/D30529

llvm-svn: 317560
 		2017-11-07 10:34:34 +00:00
..
GlobalISel [GlobalISel] Enable legalizing non-power-of-2 sized types. 2017-11-07 10:34:34 +00:00
Windows ARM: mark CPSR as clobbered for Windows VLAs 2017-08-17 02:42:24 +00:00
2006-11-10-CycleInDAG.ll
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2007-01-19-InfiniteLoop.ll [ARM] Generate consistent frame records for Thumb2 2016-08-23 09:19:22 +00:00
2007-03-07-CombinerCrash.ll
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2007-03-13-InstrSched.ll test: modernise ARM CodeGen tests 2016-12-27 18:35:19 +00:00
2007-03-21-JoinIntervalsCrash.ll
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2007-03-27-RegScavengerAssert.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
2007-03-30-RegScavengerAssert.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
2007-04-02-RegScavengerAssert.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
2007-04-03-PEIBug.ll
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2007-04-03-UndefinedSymbol.ll test: modernise ARM CodeGen tests 2016-12-27 18:35:19 +00:00
2007-04-30-CombinerCrash.ll
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2007-05-03-BadPostIndexedLd.ll
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2007-05-07-tailmerge-1.ll
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2007-05-09-tailmerge-2.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
2007-05-14-InlineAsmCstCrash.ll
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2007-05-14-RegScavengerAssert.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
2007-05-22-tailmerge-3.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
2007-05-23-BadPreIndexedStore.ll
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2007-08-15-ReuseBug.ll
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2008-02-04-LocalRegAllocBug.ll
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2008-02-29-RegAllocLocal.ll
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2008-03-05-SxtInRegBug.ll
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2008-03-07-RegScavengerAssert.ll
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2008-04-04-ScavengerAssert.ll
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2008-04-10-ScavengerAssert.ll
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2008-04-11-PHIofImpDef.ll
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2008-05-19-LiveIntervalsBug.ll
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2008-05-19-ScavengerAssert.ll
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2008-07-17-Fdiv.ll
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2008-07-24-CodeGenPrepCrash.ll
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2008-08-07-AsmPrintBug.ll test: modernise ARM CodeGen tests 2016-12-27 18:35:19 +00:00
2008-09-17-CoalescerBug.ll
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2008-11-18-ScavengerAssert.ll
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2009-02-16-SpillerBug.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
2009-02-22-SoftenFloatVaArg.ll
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2009-02-27-SpillerBug.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
2009-03-07-SpillerBug.ll
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2009-03-09-AddrModeBug.ll
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2009-04-06-AsmModifier.ll
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2009-04-08-AggregateAddr.ll
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2009-04-08-FREM.ll
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2009-04-08-FloatUndef.ll
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2009-04-09-RegScavengerAsm.ll
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2009-05-05-DAGCombineBug.ll
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2009-05-07-RegAllocLocal.ll
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2009-05-11-CodePlacementCrash.ll
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2009-05-18-InlineAsmMem.ll [ARM] Avoid using ARM instructions in Thumb mode 2017-01-31 14:35:01 +00:00
2009-06-02-ISelCrash.ll
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2009-06-04-MissingLiveIn.ll
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2009-06-15-RegScavengerAssert.ll
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2009-06-19-RegScavengerAssert.ll
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2009-06-22-CoalescerBug.ll
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2009-06-30-RegScavengerAssert.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
2009-06-30-RegScavengerAssert2.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
2009-06-30-RegScavengerAssert3.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
2009-06-30-RegScavengerAssert4.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
2009-06-30-RegScavengerAssert5.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
2009-07-01-CommuteBug.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
2009-07-09-asm-p-constraint.ll
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2009-07-18-RewriterBug.ll test: modernise ARM CodeGen tests 2016-12-27 18:35:19 +00:00
2009-07-22-ScavengerAssert.ll
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2009-07-22-SchedulerAssert.ll
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2009-07-29-VFP3Registers.ll
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2009-08-02-RegScavengerAssert-Neon.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
2009-08-04-RegScavengerAssert-2.ll
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2009-08-04-RegScavengerAssert.ll
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2009-08-15-RegScavenger-EarlyClobber.ll
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2009-08-15-RegScavengerAssert.ll
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2009-08-21-PostRAKill.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
2009-08-21-PostRAKill2.ll
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2009-08-21-PostRAKill3.ll
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2009-08-26-ScalarToVector.ll test: modernise ARM CodeGen tests 2016-12-27 18:35:19 +00:00
2009-08-27-ScalarToVector.ll test: modernise ARM CodeGen tests 2016-12-27 18:35:19 +00:00
2009-08-29-ExtractEltf32.ll
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2009-08-29-TooLongSplat.ll
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2009-08-31-LSDA-Name.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
2009-08-31-TwoRegShuffle.ll
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2009-09-09-AllOnes.ll
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2009-09-09-fpcmp-ole.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
2009-09-10-postdec.ll
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2009-09-13-InvalidSubreg.ll
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2009-09-13-InvalidSuperReg.ll
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2009-09-20-LiveIntervalsBug.ll
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2009-09-21-LiveVariablesBug.ll
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2009-09-22-LiveVariablesBug.ll
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2009-09-23-LiveVariablesBug.ll
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2009-09-24-spill-align.ll
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2009-09-27-CoalescerBug.ll
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2009-09-28-LdStOptiBug.ll
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2009-10-02-NEONSubregsBug.ll
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2009-10-16-Scope.ll [PR27284] Reverse the ownership between DICompileUnit and DISubprogram. 2016-04-15 15:57:41 +00:00
2009-10-27-double-align.ll Re-land MachineInstr: Reason locally about some memory objects before going to AA. 2017-08-30 14:57:12 +00:00
2009-10-30.ll
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2009-11-01-NeonMoves.ll
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2009-11-02-NegativeLane.ll
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2009-11-07-SubRegAsmPrinting.ll
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2009-11-13-CoalescerCrash.ll
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2009-11-13-ScavengerAssert.ll
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2009-11-13-ScavengerAssert2.ll
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2009-11-13-VRRewriterCrash.ll
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2009-11-30-LiveVariablesBug.ll
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2009-12-02-vtrn-undef.ll
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2010-03-04-eabi-fp-spill.ll
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2010-03-04-stm-undef-addr.ll
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2010-03-18-ldm-rtrn.ll
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2010-04-09-NeonSelect.ll
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2010-04-13-v2f64SplitArg.ll
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2010-04-14-SplitVector.ll
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2010-04-15-ScavengerDebugValue.ll Remove the obsolete offset parameter from @llvm.dbg.value 2017-07-28 20:21:02 +00:00
2010-05-14-IllegalType.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
2010-05-17-FastAllocCrash.ll
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2010-05-18-LocalAllocCrash.ll
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2010-05-18-PostIndexBug.ll
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2010-05-19-Shuffles.ll
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2010-05-20-NEONSpillCrash.ll
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2010-05-21-BuildVector.ll
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2010-06-11-vmovdrr-bitcast.ll
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2010-06-21-LdStMultipleBug.ll
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2010-06-21-nondarwin-tc.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
2010-06-25-Thumb2ITInvalidIterator.ll Canonicalize the representation of empty an expression in DIGlobalVariableExpression 2017-08-30 18:06:51 +00:00
2010-06-29-PartialRedefFastAlloc.ll
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2010-06-29-SubregImpDefs.ll
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2010-07-26-GlobalMerge.ll
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2010-08-04-EHCrash.ll
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2010-08-04-StackVariable.ll Remove the obsolete offset parameter from @llvm.dbg.value 2017-07-28 20:21:02 +00:00
2010-09-21-OptCmpBug.ll
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2010-10-25-ifcvt-ldm.ll
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2010-11-15-SpillEarlyClobber.ll
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2010-11-29-PrologueBug.ll [ARM] Generate consistent frame records for Thumb2 2016-08-23 09:19:22 +00:00
2010-12-07-PEIBug.ll [ARM] Generate consistent frame records for Thumb2 2016-08-23 09:19:22 +00:00
2010-12-08-tpsoft.ll
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2010-12-15-elf-lcomm.ll
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2010-12-17-LocalStackSlotCrash.ll
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2011-01-19-MergedGlobalDbg.ll llvm-dwarfdump: Make -brief the default and add a -verbose option instead. 2017-09-11 23:05:20 +00:00
2011-02-04-AntidepMultidef.ll Elide stores which are overwritten without being observed. 2017-05-16 19:43:56 +00:00
2011-02-07-AntidepClobber.ll
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2011-03-10-DAGCombineCrash.ll
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2011-03-15-LdStMultipleBug.ll
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2011-03-23-PeepholeBug.ll Codegen: Tail-duplicate during placement. 2016-10-11 20:36:43 +00:00
2011-04-07-schediv.ll
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2011-04-11-MachineLICMBug.ll
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2011-04-12-AlignBug.ll
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2011-04-12-FastRegAlloc.ll
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2011-04-15-AndVFlagPeepholeBug.ll ARM: stop emitting blx instructions for most calls on MachO. 2016-05-10 19:17:47 +00:00
2011-04-15-RegisterCmpPeephole.ll ARM: stop emitting blx instructions for most calls on MachO. 2016-05-10 19:17:47 +00:00
2011-04-26-SchedTweak.ll ARM: stop emitting blx instructions for most calls on MachO. 2016-05-10 19:17:47 +00:00
2011-04-27-IfCvtBug.ll
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2011-05-04-MultipleLandingPadSuccs.ll [Verifier] Add verification for TBAA metadata 2016-12-11 20:07:15 +00:00
2011-06-09-TailCallByVal.ll ARM: stop emitting blx instructions for most calls on MachO. 2016-05-10 19:17:47 +00:00
2011-06-16-TailCallByVal.ll
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2011-06-29-MergeGlobalsAlign.ll Revert "Use private linkage for MergedGlobals variables" on Darwin. 2016-11-11 17:50:09 +00:00
2011-07-10-GlobalMergeBug.ll
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2011-08-02-MergedGlobalDbg.ll llvm-dwarfdump: Make -brief the default and add a -verbose option instead. 2017-09-11 23:05:20 +00:00
2011-08-12-vmovqqqq-pseudo.ll
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2011-08-25-ldmia_ret.ll [ARM] Generate consistent frame records for Thumb2 2016-08-23 09:19:22 +00:00
2011-08-29-SchedCycle.ll
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2011-08-29-ldr_pre_imm.ll
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2011-09-09-OddVectorDivision.ll
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2011-09-19-cpsr.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
2011-09-28-CMovCombineBug.ll
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2011-10-26-ExpandUnalignedLoadCrash.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
2011-10-26-memset-inline.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
2011-10-26-memset-with-neon.ll
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2011-11-07-PromoteVectorLoadStore.ll
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2011-11-09-BitcastVectorDouble.ll
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2011-11-09-IllegalVectorFPIntConvert.ll
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2011-11-14-EarlyClobber.ll
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2011-11-28-DAGCombineBug.ll
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2011-11-29-128bitArithmetics.ll
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2011-11-30-MergeAlignment.ll
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2011-12-14-machine-sink.ll
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2011-12-19-sjlj-clobber.ll
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2012-01-23-PostRA-LICM.ll
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2012-01-24-RegSequenceLiveRange.ll
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2012-01-26-CoalescerBug.ll
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2012-01-26-CopyPropKills.ll
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2012-02-01-CoalescerBug.ll
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2012-03-05-FPSCR-bug.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
2012-03-13-DAGCombineBug.ll
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2012-03-26-FoldImmBug.ll
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2012-04-02-TwoAddrInstrCrash.ll
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2012-04-10-DAGCombine.ll
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2012-04-24-SplitEHCriticalEdge.ll
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2012-05-04-vmov.ll
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2012-05-10-PreferVMOVtoVDUP32.ll
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2012-05-29-TailDupBug.ll
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2012-06-12-SchedMemLatency.ll [CodeGen] Add dependency printer 2017-07-12 15:30:59 +00:00
2012-08-04-DtripleSpillReload.ll
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2012-08-08-legalize-unaligned.ll
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2012-08-09-neon-extload.ll
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2012-08-13-bfi.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
2012-08-23-legalize-vmull.ll
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2012-08-27-CopyPhysRegCrash.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
2012-08-30-select.ll Don't conditionalize Neon instructions, even in IT blocks. 2017-06-22 12:11:38 +00:00
2012-09-18-ARMv4ISelBug.ll
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2012-09-25-InlineAsmScalarToVectorConv.ll
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2012-09-25-InlineAsmScalarToVectorConv2.ll [SelectionDAG] Remove exit-on-error flag from test (PR27765) 2016-06-14 07:30:20 +00:00
2012-10-04-AAPCS-byval-align8.ll Elide stores which are overwritten without being observed. 2017-05-16 19:43:56 +00:00
2012-10-04-FixedFrame-vs-byval.ll
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2012-10-04-LDRB_POST_IMM-Crash.ll
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2012-10-18-PR14099-ByvalFrameAddress.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
2012-11-14-subs_carry.ll
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2013-01-21-PR14992.ll
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2013-02-27-expand-vfma.ll
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2013-04-05-Small-ByVal-Structs-PR15293.ll
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2013-04-16-AAPCS-C4-vs-VFP.ll
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2013-04-16-AAPCS-C5-vs-VFP.ll
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2013-04-18-load-overlap-PR14824.ll
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2013-04-21-AAPCS-VA-C.1.cp.ll
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2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP.ll
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2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP2.ll
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2013-05-05-IfConvertBug.ll
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2013-05-07-ByteLoadSameAddress.ll
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2013-05-13-AAPCS-byval-padding.ll
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2013-05-13-AAPCS-byval-padding2.ll
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2013-05-13-DAGCombiner-undef-mask.ll
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2013-05-31-char-shift-crash.ll
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2013-06-03-ByVal-2Kbytes.ll
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2013-07-29-vector-or-combine.ll
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2013-10-11-select-stalls.ll
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2013-11-08-inline-asm-neon-array.ll
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2014-01-09-pseudo_expand_implicit_reg.ll
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2014-02-05-vfp-regs-after-stack.ll
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2014-02-21-byval-reg-split-alignment.ll
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2014-05-14-DwarfEHCrash.ll
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2014-07-18-earlyclobber-str-post.ll
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2014-08-04-muls-it.ll
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2015-01-21-thumbv4t-ldstr-opt.ll
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2016-05-01-RegScavengerAssert.ll [ARM] Fix Scavenger assert due to underestimated stack size 2016-05-08 05:11:54 +00:00
2016-08-24-ARM-LDST-dbginfo-bug.ll Remove the obsolete offset parameter from @llvm.dbg.value 2017-07-28 20:21:02 +00:00
ARMLoadStoreDBG.mir MIR: Serialize CaleeSavedInfo Restored flag 2017-09-28 18:52:14 +00:00
DbgValueOtherTargets.test
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MachO-subtypes.ll
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MergeConsecutiveStores.ll
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PR15053.ll
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a15-SD-dep.ll
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a15-mla.ll
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a15-partial-update.ll
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a15.ll
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aapcs-hfa-code.ll
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aapcs-hfa.ll
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acle-intrinsics-v5.ll [ARM] ACLE Chapter 9 intrinsics 2017-05-04 07:31:28 +00:00
acle-intrinsics.ll [ARM] ACLE Chapter 9 intrinsics 2017-05-04 07:31:28 +00:00
addrmode.ll
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addrspacecast.ll
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adv-copy-opt.ll
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aeabi-read-tp.ll ARM: support `-mlong-calls` with AEABI TLS on ELF 2017-01-29 16:46:22 +00:00
aggregate-padding.ll
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alias_store.ll Fix PR31896. 2017-02-21 20:17:34 +00:00
aliases.ll
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align-sp-adjustment.ll Revert "[ARM] Mark LEApcrel instructions as isAsCheapAsAMove" 2017-05-16 17:59:07 +00:00
align.ll
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alloc-no-stack-realign.ll ARM: handle post-indexed NEON ops where the offset isn't the access width. 2017-04-20 19:54:02 +00:00
alloca-align.ll RegScavenging: Add scavengeRegisterBackwards() 2017-06-17 02:08:18 +00:00
alloca.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
and-cmpz.ll [Thumb] Teach ISel how to lower compares of AND bitmasks efficiently 2016-12-15 09:38:59 +00:00
apcs-vfp.ll
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arg-copy-elide.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
argaddr.ll
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arguments-nosplit-double.ll NFC: I simply added CHECK-LABEL to prevent false matches in the tests. 2017-07-07 13:41:33 +00:00
arguments-nosplit-i64.ll NFC: I simply added CHECK-LABEL to prevent false matches in the tests. 2017-07-07 13:41:33 +00:00
arguments.ll
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arguments2.ll
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arguments3.ll
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arguments4.ll
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arguments6.ll
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arguments8.ll
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arguments_f64_backfill.ll
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arm-abi-attr.ll Unified logic for computing target ABI in backend and front end by moving this common code to Support/TargetParser. 2017-06-30 00:03:54 +00:00
arm-and-tst-peephole.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
arm-asm.ll
…
arm-eabi.ll Add support for musl-libc on ARM Linux. 2016-06-24 21:14:33 +00:00
arm-frame-lowering-no-terminator.ll ARM: Avoid dereferencing end() in ARMFrameLowering::emitEpilogue 2016-08-21 00:08:10 +00:00
arm-frameaddr.ll
…
arm-insert-subvector.ll [ARM] Check for assembler instructions in test. 2017-08-23 11:53:24 +00:00
arm-macho-tail.ll ARM: use an external relocation for calls from MachO ARM mode. 2017-08-18 19:13:56 +00:00
arm-modifier.ll
…
arm-negative-stride.ll
…
arm-position-independence-jump-table.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
arm-position-independence.ll [ARM] Make RWPI use movw/movt when available 2017-02-07 13:07:12 +00:00
arm-returnaddr.ll
…
arm-shrink-wrapping-linux.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
arm-shrink-wrapping.ll Fix test broken by r304020 2017-05-26 22:11:18 +00:00
arm-ttype-target2.ll
…
arm32-round-conv.ll
…
arm32-rounding.ll Revert "CodeGen: ensure that libcalls are always AAPCS CC" 2016-09-07 03:17:19 +00:00
armv4.ll Fix ARMv4 support 2017-08-28 20:20:47 +00:00
atomic-64bit.ll
…
atomic-cmp.ll
…
atomic-cmpxchg.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
atomic-load-store.ll
…
atomic-op.ll Revert "Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"" 2017-10-03 16:59:13 +00:00
atomic-ops-v8.ll CodeGen: Allow small copyable blocks to "break" the CFG. 2017-01-31 23:48:32 +00:00
atomicrmw_minmax.ll
…
available_externally.ll
…
avoid-cpsr-rmw.ll [SimplifyCFG] Rewrite SinkThenElseCodeToEnd 2016-08-22 19:07:15 +00:00
bfc.ll
…
bfi.ll [ARM] Prefer BIC over BFC in ARM mode. 2017-04-07 22:01:23 +00:00
bfx.ll [ARM] Add additional matching for UBFX instructions 2016-06-01 12:01:01 +00:00
bic.ll [ARM] Prefer BIC over BFC in ARM mode. 2017-04-07 22:01:23 +00:00
bicZext.ll
…
big-endian-eh-unwind.ll
…
big-endian-neon-bitconv.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
big-endian-neon-extend.ll
…
big-endian-neon-trunc-store.ll
…
big-endian-ret-f64.ll
…
big-endian-vector-callee.ll [ARM] Split 128-bit vectors in BUILD_VECTOR lowering 2016-12-14 20:44:38 +00:00
big-endian-vector-caller.ll
…
bit-reverse-to-rbit.ll
…
bits.ll
…
bool-ext-inc.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
bswap-inline-asm.ll
…
bswap16.ll
…
build-attributes-encoding.s
…
build-attributes-fn-attr0.ll [llvm] Remove redundant --check-prefix=CHECK from tests 2016-10-24 18:57:55 +00:00
build-attributes-fn-attr1.ll [llvm] Remove redundant --check-prefix=CHECK from tests 2016-10-24 18:57:55 +00:00
build-attributes-fn-attr2.ll [llvm] Remove redundant --check-prefix=CHECK from tests 2016-10-24 18:57:55 +00:00
build-attributes-fn-attr3.ll [llvm] Remove redundant --check-prefix=CHECK from tests 2016-10-24 18:57:55 +00:00
build-attributes-fn-attr4.ll [llvm] Remove redundant --check-prefix=CHECK from tests 2016-10-24 18:57:55 +00:00
build-attributes-fn-attr5.ll Reapply r284571 (with the new tests fixed). 2016-10-19 13:43:02 +00:00
build-attributes-fn-attr6.ll This is a 1 character fix for an ARM build attribute test (r284571): the 2016-11-01 15:59:37 +00:00
build-attributes-optimization-minsize.ll
…
build-attributes-optimization-mixed.ll
…
build-attributes-optimization-optnone.ll
…
build-attributes-optimization-optsize.ll
…
build-attributes-optimization.ll
…
build-attributes.ll ARM: add arm1176j-f processor 2017-05-02 19:06:13 +00:00
bx_fold.ll
…
byval-align.ll
…
byval_load_align.ll
…
cache-intrinsic.ll
…
call-noret-minsize.ll
…
call-noret.ll
…
call-tc.ll [Thumb] Teach ISel how to lower compares of AND bitmasks efficiently 2016-12-15 09:38:59 +00:00
call.ll Don't print (PLT) on arm. 2016-06-16 16:09:53 +00:00
call_nolink.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
carry.ll
…
cdp.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
cdp2.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
cfi-alignment.ll
…
clang-section.ll Add support for #pragma clang section 2017-06-05 10:09:13 +00:00
clz.ll
…
cmn.ll
…
cmp.ll [ARM] Swap cmp operands for automatic shifts 2017-10-25 08:33:06 +00:00
cmp1-peephole-thumb.mir MIParser/MIRPrinter: Compute block successors if not explicitely specified 2017-05-05 21:09:30 +00:00
cmp2-peephole-thumb.mir MIParser/MIRPrinter: Compute block successors if not explicitely specified 2017-05-05 21:09:30 +00:00
cmpxchg-O0-be.ll ARM: fix big-endian 64-bit cmpxchg. 2017-06-30 19:51:02 +00:00
cmpxchg-O0.ll ARM: Fix CMP_SWAP expansion 2017-08-09 22:22:05 +00:00
cmpxchg-idioms.ll
…
cmpxchg-weak.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
coalesce-dbgvalue.ll Canonicalize the representation of empty an expression in DIGlobalVariableExpression 2017-08-30 18:06:51 +00:00
coalesce-subregs.ll
…
code-placement.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
combine-movc-sub.ll
…
combine-vmovdrr.ll
…
commute-movcc.ll
…
compare-call.ll
…
constant-island-crash.ll [Thumb-1] Synthesize TBB/TBH instructions to make use of compressed jump tables 2016-11-01 13:37:41 +00:00
constant-islands.ll
…
constantfp.ll Rewrite ARM execute only support to avoid the use of a command line flag and unqualified ARMSubtarget lookup. 2017-07-01 02:55:22 +00:00
constantpool-align.ll [SDAG] Use ABI type alignment for constant pools when optimizing for size 2016-10-17 12:54:07 +00:00
constantpool-promote-dbg.ll [ARM] Temporarily disable globals promotion to constant pools to prevent miscompilation 2017-05-23 19:38:37 +00:00
constantpool-promote-duplicate.ll ARM: track globals promoted to coalesced const pool entries 2017-09-07 04:00:13 +00:00
constantpool-promote-ldrh.ll [ARM] Temporarily disable globals promotion to constant pools to prevent miscompilation 2017-05-23 19:38:37 +00:00
constantpool-promote.ll [ARM] Temporarily disable globals promotion to constant pools to prevent miscompilation 2017-05-23 19:38:37 +00:00
constants.ll
…
copy-cpsr.ll
…
copy-paired-reg.ll
…
cortex-a57-misched-alu.ll [ARM] Use post-RA MI scheduler when +use-misched is set 2017-10-20 14:29:17 +00:00
cortex-a57-misched-basic.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
cortex-a57-misched-ldm-wrback.ll [CodeGen] Add dependency printer 2017-07-12 15:30:59 +00:00
cortex-a57-misched-ldm.ll [CodeGen] Add dependency printer 2017-07-12 15:30:59 +00:00
cortex-a57-misched-stm-wrback.ll [CodeGen] Add dependency printer 2017-07-12 15:30:59 +00:00
cortex-a57-misched-stm.ll [ARM] Cortex-A57 scheduling model for ARM backend (AArch32) 2017-06-02 08:53:19 +00:00
cortex-a57-misched-vfma.ll [CodeGen] Add dependency printer 2017-07-12 15:30:59 +00:00
cortex-a57-misched-vldm-wrback.ll [CodeGen] Add dependency printer 2017-07-12 15:30:59 +00:00
cortex-a57-misched-vldm.ll [CodeGen] Add dependency printer 2017-07-12 15:30:59 +00:00
cortex-a57-misched-vstm-wrback.ll [CodeGen] Add dependency printer 2017-07-12 15:30:59 +00:00
cortex-a57-misched-vstm.ll [ARM] Cortex-A57 scheduling model for ARM backend (AArch32) 2017-06-02 08:53:19 +00:00
cortexr52-misched-basic.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
crash-O0.ll
…
crash-greedy-v6.ll
…
crash-greedy.ll ARM: stop emitting blx instructions for most calls on MachO. 2016-05-10 19:17:47 +00:00
crash-on-pow2-shufflevector.ll [DAGCombiner] Fix an off-by-one error in vector logic 2017-09-28 06:17:19 +00:00
crash-shufflevector.ll
…
crash.ll
…
crc32.ll
…
cse-call.ll [ARM] Call setBooleanContents(ZeroOrOneBooleanContent) 2017-08-22 11:02:37 +00:00
cse-flags.ll
…
cse-ldrlit.ll
…
cse-libcalls.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
ctor_order.ll Unified logic for computing target ABI in backend and front end by moving this common code to Support/TargetParser. 2017-06-30 00:03:54 +00:00
ctors_dtors.ll Unified logic for computing target ABI in backend and front end by moving this common code to Support/TargetParser. 2017-06-30 00:03:54 +00:00
cttz.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
cttz_vector.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
cxx-tlscc.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
dag-combine-ldst.ll Elide stores which are overwritten without being observed. 2017-05-16 19:43:56 +00:00
dagcombine-anyexttozeroext.ll
…
dagcombine-concatvector.ll
…
darwin-eabi.ll
…
darwin-tls-preserved.ll ARM: TLS calling convention doesn't preserve r9 or r12 on Darwin. 2017-04-19 18:07:54 +00:00
darwin-tls.ll ARM: put extern __thread stubs in a special section. 2016-04-25 21:12:04 +00:00
data-in-code-annotations.ll
…
dbg-range-extension.mir MIParser/MIRPrinter: Compute block successors if not explicitely specified 2017-05-05 21:09:30 +00:00
dbg.ll
…
debug-frame-large-stack.ll [ARM] Generate consistent frame records for Thumb2 2016-08-23 09:19:22 +00:00
debug-frame-no-debug.ll
…
debug-frame-vararg.ll [PR27284] Reverse the ownership between DICompileUnit and DISubprogram. 2016-04-15 15:57:41 +00:00
debug-frame.ll [PR27284] Reverse the ownership between DICompileUnit and DISubprogram. 2016-04-15 15:57:41 +00:00
debug-info-arg.ll Remove PrologEpilogInserter's usage of DBG_VALUE's offset field 2017-08-01 21:45:24 +00:00
debug-info-blocks.ll llvm-dwarfdump: Make -brief the default and add a -verbose option instead. 2017-09-11 23:05:20 +00:00
debug-info-branch-folding.ll Remove the obsolete offset parameter from @llvm.dbg.value 2017-07-28 20:21:02 +00:00
debug-info-d16-reg.ll Remove the obsolete offset parameter from @llvm.dbg.value 2017-07-28 20:21:02 +00:00
debug-info-no-frame.ll [PR27284] Reverse the ownership between DICompileUnit and DISubprogram. 2016-04-15 15:57:41 +00:00
debug-info-qreg.ll Remove the obsolete offset parameter from @llvm.dbg.value 2017-07-28 20:21:02 +00:00
debug-info-s16-reg.ll Remove the obsolete offset parameter from @llvm.dbg.value 2017-07-28 20:21:02 +00:00
debug-info-sreg2.ll llvm-dwarfdump: Replace -debug-dump=sect option with individual options. 2017-09-11 22:59:45 +00:00
debug-segmented-stacks.ll Fix ARMv4 support 2017-08-28 20:20:47 +00:00
debugtrap.ll
…
default-float-abi.ll Add support for musl-libc on ARM Linux. 2016-06-24 21:14:33 +00:00
default-reloc.ll Fix default reloc model on ARM. 2016-05-28 10:41:15 +00:00
deprecated-asm.s Summary: Currently there is no way to disable deprecated warning from asm like this 2016-12-05 23:55:13 +00:00
deps-fix.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
disable-fp-elim.ll
…
disable-tail-calls.ll
…
div.ll [ARM] Add support for armv7ve triple in llvm (PR31358). 2017-02-09 23:29:14 +00:00
divmod-eabi.ll ARM: use divmod libcalls on embedded MachO platforms too. 2017-05-08 20:00:14 +00:00
divmod-hwdiv.ll [ARM] Check for correct HW div when lowering divmod 2017-04-18 08:32:27 +00:00
divmod.ll ARM: use divmod libcalls on embedded MachO platforms too. 2017-05-08 20:00:14 +00:00
domain-conv-vmovs.ll
…
dwarf-eh.ll Remove Bitrig: LLVM Changes 2017-07-21 22:48:47 +00:00
dwarf-unwind.ll [ARM] Generate consistent frame records for Thumb2 2016-08-23 09:19:22 +00:00
dyn-stackalloc.ll
…
early-cfi-sections.ll Emit .cfi_sections before the first .cfi_startproc 2017-01-02 18:05:27 +00:00
eh-dispcont.ll [ARM] Fix registers clobbered by SjLj EH on soft-float targets 2016-10-11 10:06:59 +00:00
eh-resume-darwin.ll
…
ehabi-filters.ll
…
ehabi-handlerdata-nounwind.ll
…
ehabi-handlerdata.ll
…
ehabi-no-landingpad.ll
…
ehabi-unwind.ll
…
ehabi.ll Add support for musl-libc on ARM Linux. 2016-06-24 21:14:33 +00:00
elf-lcomm-align.ll
…
emit-big-cst.ll
…
emutls.ll Don't print (PLT) on arm. 2016-06-16 16:09:53 +00:00
emutls1.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
emutls_generic.ll
…
execute-only-big-stack-frame.ll Rewrite ARM execute only support to avoid the use of a command line flag and unqualified ARMSubtarget lookup. 2017-07-01 02:55:22 +00:00
execute-only-section.ll Rewrite ARM execute only support to avoid the use of a command line flag and unqualified ARMSubtarget lookup. 2017-07-01 02:55:22 +00:00
execute-only.ll Rewrite ARM execute only support to avoid the use of a command line flag and unqualified ARMSubtarget lookup. 2017-07-01 02:55:22 +00:00
expand-pseudos.mir [ARM] Make ARMExpandPseudo add implicit uses for predicated instructions 2017-09-05 22:54:06 +00:00
extload-knownzero.ll
…
extloadi1.ll
…
fabs-neon.ll
…
fabs-to-bfc.ll
…
fabss.ll
…
fadds.ll
…
fast-isel-GEP-coalesce.ll
…
fast-isel-align.ll [ARM] Use VCMP, not VCMPE, for floating point equality comparisons 2017-02-13 12:32:47 +00:00
fast-isel-binary.ll
…
fast-isel-br-const.ll
…
fast-isel-br-phi.ll
…
fast-isel-call-multi-reg-return.ll
…
fast-isel-call.ll Revert "Revert "Map DynamicNoPIC to Static on non-darwin."" 2016-05-28 04:47:13 +00:00
fast-isel-cmp-imm.ll [ARM] Use VCMP, not VCMPE, for floating point equality comparisons 2017-02-13 12:32:47 +00:00
fast-isel-conversion.ll
…
fast-isel-crash.ll
…
fast-isel-crash2.ll
…
fast-isel-deadcode.ll ARM: stop emitting blx instructions for most calls on MachO. 2016-05-10 19:17:47 +00:00
fast-isel-ext.ll
…
fast-isel-fold.ll
…
fast-isel-frameaddr.ll [ARM] Generate consistent frame records for Thumb2 2016-08-23 09:19:22 +00:00
fast-isel-icmp.ll
…
fast-isel-indirectbr.ll
…
fast-isel-inline-asm.ll
…
fast-isel-intrinsic.ll Revert "Revert "Map DynamicNoPIC to Static on non-darwin."" 2016-05-28 04:47:13 +00:00
fast-isel-ldr-str-arm.ll
…
fast-isel-ldr-str-thumb-neg-index.ll
…
fast-isel-ldrh-strh-arm.ll
…
fast-isel-load-store-verify.ll
…
fast-isel-mvn.ll
…
fast-isel-pic.ll
…
fast-isel-pie.ll Use shouldAssumeDSOLocal. 2016-06-20 17:45:33 +00:00
fast-isel-pred.ll
…
fast-isel-redefinition.ll
…
fast-isel-remat-same-constant.ll
…
fast-isel-ret.ll
…
fast-isel-select.ll
…
fast-isel-shift-materialize.ll
…
fast-isel-shifter.ll
…
fast-isel-static.ll
…
fast-isel-update-valuemap-for-extract.ll
…
fast-isel-vaddd.ll
…
fast-isel-vararg.ll
…
fast-isel.ll Revert "Revert "Map DynamicNoPIC to Static on non-darwin."" 2016-05-28 04:47:13 +00:00
fast-tail-call.ll
…
fastcc-vfp.ll
…
fastisel-gep-promote-before-add.ll
…
fastisel-thumb-litpool.ll AsmPrinter: mark the beginning and the end of a function in verbose mode 2017-05-23 21:22:16 +00:00
fcopysign.ll
…
fdivs.ll
…
fence-singlethread.ll Enhance synchscope representation 2017-07-11 22:23:00 +00:00
fixunsdfdi.ll
…
flag-crash.ll
…
float-helpers.s [ARM] Add test to check pcs of ARM ABI runtime floating point helpers 2017-07-28 09:21:00 +00:00
floorf.ll
…
fmacs.ll
…
fmdrr-fmrrd.ll
…
fmscs.ll
…
fmuls.ll
…
fnattr-trap.ll
…
fnegs.ll
…
fnmacs.ll
…
fnmscs.ll [ARM] Add missing selection patterns for vnmla 2017-09-22 09:50:52 +00:00
fnmul.ll
…
fnmuls.ll
…
fold-const.ll
…
fold-stack-adjust.ll Codegen: Make chains from trellis-shaped CFGs 2017-02-15 19:49:14 +00:00
formal.ll
…
fp-arg-shuffle.ll
…
fp-fast.ll
…
fp-only-sp.ll ARM: make sure FastISel bails on f64 operations for Cortex-M4. 2017-02-23 22:35:00 +00:00
fp.ll
…
fp16-args.ll
…
fp16-promote.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
fp16-v3.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
fp16.ll Add support for musl-libc on ARM Linux. 2016-06-24 21:14:33 +00:00
fp_convert.ll
…
fparith.ll
…
fpcmp-f64-neon-opt.ll
…
fpcmp-opt.ll [ARM] Prefer BIC over BFC in ARM mode. 2017-04-07 22:01:23 +00:00
fpcmp.ll [ARM] Use VCMP, not VCMPE, for floating point equality comparisons 2017-02-13 12:32:47 +00:00
fpcmp_ueq.ll [ARM] Use VCMP, not VCMPE, for floating point equality comparisons 2017-02-13 12:32:47 +00:00
fpconsts.ll
…
fpconv.ll
…
fpmem.ll
…
fpoffset_overflow.mir RegScavenging: Add scavengeRegisterBackwards() 2017-06-17 02:08:18 +00:00
fpow.ll
…
fpowi.ll test: modernise ARM CodeGen tests 2016-12-27 18:35:19 +00:00
fpscr-intrinsics.ll [ARM] Reapply r296865 "[ARM] fpscr read/write intrinsics not aware of each other"" 2017-03-07 11:17:53 +00:00
fptoint.ll
…
frame-register.ll
…
fsubs.ll
…
func-argpassing-endian.ll
…
fusedMAC.ll
…
gep-optimization.ll
…
ghc-tcreturn-lowered.ll
…
global-merge-1.ll Revert "Use private linkage for MergedGlobals variables" on Darwin. 2016-11-11 17:50:09 +00:00
global-merge-addrspace.ll
…
global-merge-external.ll [GlobalMerge] Don't merge globals that may be preempted 2017-06-02 10:24:14 +00:00
global-merge.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
globals.ll
…
gpr-paired-spill-thumbinst.ll
…
gpr-paired-spill.ll In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled. 2017-03-14 00:34:14 +00:00
gv-stubs-crash.ll
…
half.ll ARM: stop emitting blx instructions for most calls on MachO. 2016-05-10 19:17:47 +00:00
hardfloat_neon.ll
…
hello.ll [ARM] Generate consistent frame records for Thumb2 2016-08-23 09:19:22 +00:00
hfa-in-contiguous-registers.ll
…
hidden-vis-2.ll
…
hidden-vis-3.ll
…
hidden-vis.ll
…
hints.ll
…
i1.ll [ARM] Call setBooleanContents(ZeroOrOneBooleanContent) 2017-08-22 11:02:37 +00:00
iabs.ll
…
ifconv-kills.ll
…
ifconv-regmask.ll
…
ifcvt-branch-weight-bug.ll Fix buildbot failure after rL303327: [BPI] Reduce the probability of unreachable edge to minimal value greater than 0. 2017-05-18 07:20:52 +00:00
ifcvt-branch-weight.ll [IfConversion] Maintain the CFG when predicating/merging blocks in IfConvert* 2017-08-11 06:57:08 +00:00
ifcvt-callback.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
ifcvt-dead-def.ll
…
ifcvt-iter-indbr.ll [ARM] Generate consistent frame records for Thumb2 2016-08-23 09:19:22 +00:00
ifcvt-regmask-noreturn.ll
…
ifcvt1.ll
…
ifcvt2.ll
…
ifcvt3.ll
…
ifcvt4.ll Codegen: Tail Merge: Be less aggressive with special cases. 2016-08-10 18:36:18 +00:00
ifcvt5.ll [ARM] Generate consistent frame records for Thumb2 2016-08-23 09:19:22 +00:00
ifcvt6.ll
…
ifcvt7.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
ifcvt8.ll
…
ifcvt9.ll
…
ifcvt10.ll In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled. 2017-03-14 00:34:14 +00:00
ifcvt11.ll
…
ifcvt12.ll
…
illegal-bitfield-loadstore.ll Re-land MachineInstr: Reason locally about some memory objects before going to AA. 2017-08-30 14:57:12 +00:00
illegal-vector-bitcast.ll
…
imm-peephole-arm.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
imm-peephole-thumb.mir MIR: Print the register class or bank in vreg defs 2017-10-24 18:04:54 +00:00
imm.ll
…
immcost.ll [ARM] ADD with a negative offset can become SUB for free 2016-09-09 13:35:36 +00:00
indirect-hidden.ll
…
indirect-reg-input.ll
…
indirectbr-2.ll
…
indirectbr-3.ll [IfConversion] Maintain the CFG when predicating/merging blocks in IfConvert* 2017-08-11 06:57:08 +00:00
indirectbr.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
inline-diagnostics.ll
…
inlineasm-64bit.ll
…
inlineasm-X-allocation.ll [ARM] Add support for the X asm constraint 2016-04-25 14:29:18 +00:00
inlineasm-X-constraint.ll Pass the test file in through stdin instead of by filename. 2016-04-26 03:43:49 +00:00
inlineasm-global.ll
…
inlineasm-imm-arm.ll
…
inlineasm-imm-thumb.ll
…
inlineasm-imm-thumb2.ll
…
inlineasm-ldr-pseudo.ll [ARM] Fixup tests to take into account mov translation. NFC. 2016-05-12 21:22:37 +00:00
inlineasm-switch-mode-oneway-from-arm.ll
…
inlineasm-switch-mode-oneway-from-thumb.ll Revert r265817 2016-04-08 18:15:37 +00:00
inlineasm-switch-mode.ll Revert r265817 2016-04-08 18:15:37 +00:00
inlineasm.ll
…
inlineasm2.ll
…
inlineasm3.ll [ARM] Skip inline asm memory operands in DAGToDAGISel 2016-07-20 09:48:24 +00:00
inlineasm4.ll
…
insn-sched1.ll [ARM] Generate consistent frame records for Thumb2 2016-08-23 09:19:22 +00:00
int-to-fp.ll
…
integer_insertelement.ll
…
interrupt-attr.ll ARM: use r7 as the frame-pointer on all MachO targets. 2016-04-11 22:27:40 +00:00
interval-update-remat.ll Add address space mangling to lifetime intrinsics 2017-04-10 20:18:21 +00:00
interwork.ll [ARM] Add ".code 32" to functions in the ARM instruction set 2016-09-13 12:18:15 +00:00
intrinsics-coprocessor.ll [ARM] Avoid using ARM instructions in Thumb mode 2017-01-31 14:35:01 +00:00
intrinsics-crypto.ll
…
intrinsics-memory-barrier.ll
…
intrinsics-overflow.ll Revert r313618 "[ARM] Use ADDCARRY / SUBCARRY" 2017-11-01 14:06:57 +00:00
intrinsics-v8.ll
…
invalid-target.ll
…
invalidated-save-point.ll [Improve CodeGen Testing] This patch renables MIRPrinter print fields which have value equal to its default. 2017-06-06 08:16:19 +00:00
invoke-donothing-assert.ll
…
isel-v8i32-crash.ll
…
ispositive.ll
…
jump-table-islands-split.ll
…
jump-table-islands.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
jump-table-tbh.ll [ARM] Add tGPRwithpc register class and use it for TBB/THH 2017-06-29 08:45:31 +00:00
jumptable-label.ll
…
krait-cpu-div-attribute.ll
…
large-stack.ll
…
ldaex-stlex.ll
…
ldc2l.ll [ARM] Add backend support for load/store intrinsics. 2016-05-31 12:39:30 +00:00
ldm-base-writeback.ll [ARM] Transform LDMs into writeback form to save code size 2016-06-07 11:47:24 +00:00
ldm-stm-base-materialization.ll
…
ldm-stm-i256.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
ldm.ll
…
ldr.ll
…
ldr_ext.ll
…
ldr_frame.ll
…
ldr_post.ll
…
ldr_pre.ll
…
ldrd-memoper.ll
…
ldrd.ll Add address space mangling to lifetime intrinsics 2017-04-10 20:18:21 +00:00
ldst-f32-2-i32.ll
…
ldstrex-m.ll
…
ldstrex.ll
…
legalize-unaligned-load.ll Delete Default and JITDefault code models 2017-08-03 02:16:21 +00:00
lit.local.cfg
…
litpool-licm.ll ARM: don't attempt to merge litpools referencing different PC-anchors. 2016-05-05 18:38:53 +00:00
load-address-masked.ll
…
load-arm.ll ARM: add extra test for addrmode folding. 2017-05-03 16:54:30 +00:00
load-combine-big-endian.ll [DAGCombiner] Support {a|s}ext, {a|z|s}ext load nodes in load combine 2017-03-01 18:12:29 +00:00
load-combine.ll [DAGCombiner] Support {a|s}ext, {a|z|s}ext load nodes in load combine 2017-03-01 18:12:29 +00:00
load-global.ll
…
load-store-flags.ll
…
load.ll
…
load_i1_select.ll
…
load_store_multiple.ll [ARM] Fix invalid VLDM/VSTM access when targeting Big Endian with NEON 2016-10-10 16:01:54 +00:00
load_store_opt_kill.mir [ARM] Fix bug in ARMLoadStoreOptimizer when kill flags are missing. 2017-08-28 19:03:45 +00:00
local-call.ll ARM: stop emitting blx instructions for most calls on MachO. 2016-05-10 19:17:47 +00:00
log2_not_readnone.ll
…
long-setcc.ll [NFC] Use stdin for some tests instead of positional argument. 2017-06-29 14:51:54 +00:00
long.ll
…
longMAC.ll [ARM] Fix mixup between Lo and Hi in SMLALBB formation. 2017-03-25 00:13:24 +00:00
long_shift.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
loopvectorize_pr33804.ll [LoopVectorizer] Add more testcases for PR33804. 2017-09-18 17:28:15 +00:00
lowerMUL-newload.ll [SelectionDAG] [ARM CodeGen] Fix chain information of LowerMUL 2017-04-06 20:22:51 +00:00
lsr-code-insertion.ll ARM: override cost function to re-enable ConstantHoisting (& fix it). 2016-04-13 23:08:27 +00:00
lsr-icmp-imm.ll [Thumb] Select (CMPZ X, -C) -> (CMPZ (ADDS X, C), 0) 2016-09-09 12:52:24 +00:00
lsr-scale-addr-mode.ll [ARM] Assign cost of scaling for Cortex-R52 2016-10-18 09:08:54 +00:00
lsr-unfolded-offset.ll [ARM] Generate consistent frame records for Thumb2 2016-08-23 09:19:22 +00:00
machine-copyprop.mir MachineCopyPropagation: Respect implicit operands of COPY 2017-02-04 02:27:20 +00:00
machine-cse-cmp.ll Revert "CodeGen: Allow small copyable blocks to "break" the CFG." 2017-01-11 19:55:19 +00:00
machine-licm.ll
…
macho-extern-hidden.ll Use isTargetMachO instead of isTargetDarwin. 2016-08-24 19:02:29 +00:00
macho-frame-offset.ll ARM: use callee-saved list in the order they're actually saved. 2016-05-13 19:16:14 +00:00
mature-mc-support.ll [LLC] Add an inline assembly diagnostics handler. 2017-02-03 11:14:39 +00:00
mem.ll
…
memcpy-inline.ll [ARM] Fix lowering of misaligned memcpy/memset 2017-05-26 13:59:12 +00:00
memcpy-ldm-stm.ll
…
memcpy-no-inline.ll Code size optimisation: do not inline memcpy if this expansion results 2016-06-03 15:38:55 +00:00
memfunc.ll [ARM] Generate consistent frame records for Thumb2 2016-08-23 09:19:22 +00:00
memset-inline.ll [ARM] Fix lowering of misaligned memcpy/memset 2017-05-26 13:59:12 +00:00
metadata-default.ll
…
metadata-short-enums.ll
…
metadata-short-wchar.ll
…
minmax.ll
…
minsize-call-cse.ll [ARM] Prefer indirect calls in minsize mode 2016-07-15 07:55:21 +00:00
minsize-imms.ll
…
minsize-litpools.ll
…
misched-copy-arm.ll CodeGen: Rename DEBUG_TYPE to match passnames 2017-05-25 21:26:32 +00:00
misched-fp-basic.ll CodeGen: Rename DEBUG_TYPE to match passnames 2017-05-25 21:26:32 +00:00
misched-fusion-aes.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
misched-int-basic-thumb2.mir CodeGen: Rename DEBUG_TYPE to match passnames 2017-05-25 21:26:32 +00:00
misched-int-basic.mir CodeGen: Rename DEBUG_TYPE to match passnames 2017-05-25 21:26:32 +00:00
mls.ll
…
movcc-double.ll
…
movt-movw-global.ll
…
movt.ll [ARM] Enable Cortex-M23 and Cortex-M33 support. 2017-02-01 11:55:03 +00:00
msr-it-block.ll [ARM] Fix incorrect mask bits in MSR encoding for write_register intrinsic 2017-02-10 17:41:08 +00:00
mul.ll
…
mul_const.ll
…
mulhi.ll
…
mult-alt-generic-arm.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
mvn.ll
…
named-reg-alloc.ll
…
named-reg-notareg.ll
…
negate-i1.ll [DAG] optimize negation of bool 2016-10-19 16:58:59 +00:00
negative-offset.ll
…
neon-fma.ll
…
neon-spfp.ll
…
neon-v8.1a.ll
…
neon_arith1.ll
…
neon_cmp.ll
…
neon_div.ll ARM: fix vectorized division on WoA 2017-01-27 03:41:53 +00:00
neon_fpconv.ll
…
neon_ld1.ll
…
neon_ld2.ll
…
neon_minmax.ll
…
neon_shift.ll
…
neon_spill.ll
…
neon_vabs.ll Do full codegen for various tests. NFC 2017-02-27 01:15:57 +00:00
neon_vshl_minint.ll
…
nest-register.ll
…
no-arm-mode.ll [ARM] Emit error when ARM exec mode is not available. 2017-08-09 15:39:10 +00:00
no-cfi.ll Canonicalize the representation of empty an expression in DIGlobalVariableExpression 2017-08-30 18:06:51 +00:00
no-cmov2bfi.ll [ARM] Fix computeKnownBits for ARMISD::CMOV 2017-03-23 16:47:47 +00:00
no-fpscr-liveness.ll LiveIntervalAnalysis: Fix alias regunit reserved definition 2017-09-01 18:36:26 +00:00
no-fpu.ll
…
no-tail-call.ll
…
no_redundant_trunc_for_cmp.ll DAG: avoid duplicated truncating for sign extended operand 2016-07-29 23:33:48 +00:00
none-macho-v4t.ll
…
none-macho.ll ARM: use r7 as the frame-pointer on all MachO targets. 2016-04-11 22:27:40 +00:00
noopt-dmb-v7.ll
…
nop_concat_vectors.ll
…
noreturn.ll [ARM] Generate consistent frame records for Thumb2 2016-08-23 09:19:22 +00:00
null-streamer.ll
…
opt-shuff-tstore.ll
…
optimize-dmbs-v7.ll
…
optselect-regclass.ll
…
out-of-registers.ll
…
pack.ll
…
peephole-bitcast.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
pei-swiftself.mir ARMFrameLowering: Only set ExtraCSSpill for actually unused registers. 2017-07-28 01:36:32 +00:00
phi.ll Turn on -addr-sink-using-gep by default. 2017-04-06 22:42:18 +00:00
pic.ll Don't print (PLT) on arm. 2016-06-16 16:09:53 +00:00
pie.ll Add a use of shouldAssumeDSOLocal to ARM. 2016-05-31 15:31:55 +00:00
plt-relative-reloc.ll CodeGen: Use PLT relocations for relative references to unnamed_addr functions. 2016-04-22 20:40:10 +00:00
popcnt.ll
…
pr3502.ll
…
pr13249.ll
…
pr18364-movw.ll
…
pr25317.ll
…
pr25838.ll
…
pr26669.ll
…
pr32545.ll [SDAG] Fix visitAND optimization to deal with vector extract case again. 2017-04-06 19:05:41 +00:00
preferred-align.ll
…
prefetch.ll
…
prera-ldst-aliasing.mir [ARM] Use alias analysis in ARMPreAllocLoadStoreOpt. 2017-03-17 00:34:26 +00:00
prera-ldst-insertpt.mir [ARM] Fix insert point for store rescheduling. 2017-03-02 21:39:39 +00:00
print-memb-operand.ll
…
private.ll
…
rbit.ll [SelectionDAG] Add support for BITREVERSE constant folding 2017-01-16 13:39:00 +00:00
readcyclecounter.ll
…
readtp.ll Add newline to end of test file. NFC. 2017-09-14 14:48:59 +00:00
reg_sequence.ll
…
regpair_hint_phys.ll
…
rem_crash.ll
…
ret0.ll
…
ret_arg1.ll
…
ret_arg2.ll
…
ret_arg3.ll
…
ret_arg4.ll
…
ret_arg5.ll
…
ret_f32_arg2.ll
…
ret_f32_arg5.ll
…
ret_f64_arg2.ll
…
ret_f64_arg_reg_split.ll
…
ret_f64_arg_split.ll
…
ret_f64_arg_stack.ll
…
ret_i64_arg2.ll
…
ret_i64_arg3.ll
…
ret_i64_arg_split.ll
…
ret_i128_arg2.ll
…
ret_sret_vector.ll
…
ret_void.ll
…
returned-ext.ll Revert "Disable this-return argument forwarding on ARM/AArch64" 2016-07-20 04:13:01 +00:00
returned-trunc-tail-calls.ll
…
rev.ll The automatic CHECK: to CHECK-LABEL: conversion, back in 2013, 2017-02-25 15:17:16 +00:00
ror.ll [DAGCombiner] visitRotate patch to optimize pair of ROTR/ROTL instructions into one with combined shift operand. 2017-07-05 17:55:42 +00:00
rotate.ll
…
saxpy10-a9.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
sbfx.ll
…
scavenging.mir [ARM] Remove FeatureNoARM implies ModeThumb. 2017-08-09 13:53:28 +00:00
sched-it-debug-nodes.mir ARM: Fix cases where CSI Restored bit is not cleared 2017-09-28 23:12:06 +00:00
section-name.ll
…
section.ll
…
segmented-stacks-dynamic.ll Fix ARMv4 support 2017-08-28 20:20:47 +00:00
segmented-stacks.ll Fix ARMv4 support 2017-08-28 20:20:47 +00:00
select-imm.ll
…
select-undef.ll
…
select.ll
…
select_const.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
select_xform.ll [DAGCombiner] fold binops with constant into select-of-constants 2017-03-01 22:51:31 +00:00
setcc-logic.ll [DAGCombiner] add and use TLI hook to convert and-of-seteq / or-of-setne to bitwise logic+setcc (PR32401) 2017-04-05 14:09:39 +00:00
setcc-type-mismatch.ll
…
setjmp_longjmp.ll [ARM] Restore the right frame pointer register in Int_eh_sjlj_longjmp 2017-09-28 19:04:30 +00:00
shift-combine.ll Make the canonicalisation on shifts benifit to more case. 2016-12-23 02:56:07 +00:00
shift-i64.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
shifter_operand.ll
…
shuffle.ll
…
sincos.ll [SelectionDAG] Allow sin/cos -> sincos optimization on GNU triples w/ just -fno-math-errno 2017-06-12 17:15:41 +00:00
single-issue-r52.mir CodeGen: Rename DEBUG_TYPE to match passnames 2017-05-25 21:26:32 +00:00
sjlj-prepare-critical-edge.ll ARM: stop emitting blx instructions for most calls on MachO. 2016-05-10 19:17:47 +00:00
sjljeh-swifterror.ll SjLjEHPrepare: Fix the pass for swifterror arguments 2017-03-07 20:29:02 +00:00
sjljehprepare-lower-empty-struct.ll [ARM] Fix SJLJ exception handling when manually chosen on a platform where it isn't default 2017-09-28 19:04:14 +00:00
smml.ll In Thumb1, materialize a move between low registers as a `movs`, if CPSR isn't live. 2017-03-07 09:38:16 +00:00
smul.ll [ARM] Move SMULW[B|T] isel to DAG Combine 2017-03-14 09:13:22 +00:00
softfp-fabs-fneg.ll [ARM] Prefer BIC over BFC in ARM mode. 2017-04-07 22:01:23 +00:00
space-directive.ll
…
special-reg-acore.ll
…
special-reg-mcore.ll [ARM] Fix incorrect mask bits in MSR encoding for write_register intrinsic 2017-02-10 17:41:08 +00:00
special-reg-v8m-base.ll
…
special-reg-v8m-main.ll [ARM] Unify handling of M-Class system registers 2017-07-19 12:57:16 +00:00
special-reg.ll
…
spill-q.ll
…
ssat-lower.ll
…
ssat-upper.ll
…
ssat-v4t.ll [ARM] Saturation instructions are DSP-only 2016-07-25 22:25:25 +00:00
ssat.ll [ARM] Saturation instructions are DSP-only 2016-07-25 22:25:25 +00:00
ssp-data-layout.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
stack-alignment.ll
…
stack-frame.ll
…
stack-protector-bmovpcb_call.ll
…
stack_guard_remat.ll Add address space mangling to lifetime intrinsics 2017-04-10 20:18:21 +00:00
stackpointer.ll
…
static-addr-hoisting.ll In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled. 2017-03-14 00:34:14 +00:00
stc2.ll [ARM] Add backend support for load/store intrinsics. 2016-05-31 12:39:30 +00:00
stm.ll
…
str_post.ll
…
str_pre-2.ll Unified logic for computing target ABI in backend and front end by moving this common code to Support/TargetParser. 2017-06-30 00:03:54 +00:00
str_pre.ll
…
str_trunc.ll
…
struct-byval-frame-index.ll [Dominators] Include infinite loops in PostDominatorTree 2017-08-15 18:14:57 +00:00
struct_byval.ll ARM: stop emitting blx instructions for most calls on MachO. 2016-05-10 19:17:47 +00:00
struct_byval_arm_t1_t2.ll [Thumb] Emit Thumb move in both Thumb modes for struct_byval predicates 2016-07-29 09:16:46 +00:00
sub-cmp-peephole.ll [ARM] Call setBooleanContents(ZeroOrOneBooleanContent) 2017-08-22 11:02:37 +00:00
sub.ll
…
subreg-remat.ll
…
subtarget-features-long-calls.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
subtarget-no-movt.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
swift-atomics.ll
…
swift-ios.ll
…
swift-return.ll More swift calling convention tests 2016-10-28 17:21:05 +00:00
swift-vldm.ll
…
swifterror.ll Revert "Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"" 2017-10-03 16:59:13 +00:00
swiftself.ll [ARM/AArch ISel] SwiftCC: First parameters that are marked swiftself are not 'this returns' 2017-02-08 22:30:47 +00:00
switch-minsize.ll [SDAGBuilder] Don't create a binary tree for switches in minsize mode 2016-09-08 13:12:22 +00:00
sxt_rot.ll [ARM] Improve sxta{b|h} and uxta{b|h} tests 2016-08-10 09:34:34 +00:00
t2-imm.ll
…
t2-shrink-ldrpost.ll [ARM] Shrink post-indexed LDR and STR to LDM/STM 2016-06-07 12:13:34 +00:00
t2abs-killflags.ll
…
tail-call-builtin.ll Revert "CodeGen: ensure that libcalls are always AAPCS CC" 2016-09-07 03:17:19 +00:00
tail-call-float.ll [ARM] Relax restriction on variadic functions for tailcall optimization 2016-11-17 10:56:58 +00:00
tail-call-weak.ll ARM: stop emitting blx instructions for most calls on MachO. 2016-05-10 19:17:47 +00:00
tail-call.ll [ARM] Relax restriction on variadic functions for tailcall optimization 2016-11-17 10:56:58 +00:00
tail-dup-bundle.mir Add test case for r311511 2017-08-23 03:17:59 +00:00
tail-dup-kill-flags.ll
…
tail-dup.ll
…
tail-merge-branch-weight.ll
…
tail-opts.ll [BranchFolding] Tail common all identical unreachable blocks 2017-02-14 21:02:24 +00:00
tailcall-mem-intrinsics.ll Fix a bug for rL312641. 2017-09-08 16:44:52 +00:00
taildup-branch-weight.ll
…
test-sharedidx.ll
…
this-return.ll Revert "Disable this-return argument forwarding on ARM/AArch64" 2016-07-20 04:13:01 +00:00
thread_pointer.ll test: modernise ARM CodeGen tests 2016-12-27 18:35:19 +00:00
thumb-alignment.ll
…
thumb-big-stack.ll
…
thumb-litpool.ll
…
thumb-stub.ll Avoid a load for local functions. 2016-06-01 21:57:11 +00:00
thumb1-div.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
thumb1-ldst-opt.ll [MIR] Print on the given output instead of stderr. 2016-07-13 20:36:03 +00:00
thumb1-varalloc.ll ARM: stop emitting blx instructions for most calls on MachO. 2016-05-10 19:17:47 +00:00
thumb1_return_sequence.ll [ARM] Dynamic stack alignment for 16-bit Thumb 2017-10-22 11:56:35 +00:00
thumb2-it-block.ll [NFC] Use stdin for some tests instead of positional argument. 2017-06-29 14:51:54 +00:00
thumb2-size-opt.ll ARM: check alignment before transforming ldr -> ldm (or similar). 2016-09-19 09:11:09 +00:00
thumb2-size-reduction-internal-flags.ll
…
thumb_indirect_calls.ll
…
tls-models.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
tls1.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
tls2.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
tls3.ll test: modernise ARM CodeGen tests 2016-12-27 18:35:19 +00:00
trap.ll
…
trunc_ldr.ll
…
truncstore-dag-combine.ll
…
tst_teq.ll
…
twoaddrinstr.ll ExpandPostRAPseudos should transfer implicit uses, not only implicit defs 2016-07-15 22:31:14 +00:00
uint64tof64.ll
…
umulo-32.ll
…
unaligned_load_store.ll
…
unaligned_load_store_vector.ll
…
unaligned_load_store_vfp.ll
…
undef-sext.ll
…
undefined.ll
…
unfold-shifts.ll [ARM] and, or, xor and add with shl combine 2017-11-02 10:43:10 +00:00
unord.ll
…
unsafe-fsub.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
unschedule-first-call.ll [ScheduleDAG] Don't schedule node with physical register interference 2017-08-01 00:28:40 +00:00
unwind-init.ll
…
urem-opt-size.ll [ARM] Code size optimisation to lower udiv+urem to udiv+mls instead of a 2016-10-03 10:12:32 +00:00
usat-lower.ll
…
usat-upper.ll
…
usat-v4t.ll [ARM] Saturation instructions are DSP-only 2016-07-25 22:25:25 +00:00
uxt_rot.ll [ARM] Improve sxta{b|h} and uxta{b|h} tests 2016-08-10 09:34:34 +00:00
uxtb.ll test: modernise ARM CodeGen tests 2016-12-27 18:35:19 +00:00
v1-constant-fold.ll
…
v6-jumptable-clobber.mir MIR: remove explicit "noVRegs" property. 2017-05-30 21:28:57 +00:00
v6m-smul-with-overflow.ll Fix signed multiplication with overflow fallback. 2017-04-26 13:41:43 +00:00
v6m-umul-with-overflow.ll DAG: correctly legalize UMULO. 2017-06-20 15:01:38 +00:00
v7k-abi-align.ll [ARM] Generate consistent frame records for Thumb2 2016-08-23 09:19:22 +00:00
v7k-libcalls.ll [ARM] Use aapcs_vfp for ___truncdfhf2 on v7k. 2016-06-24 00:08:01 +00:00
v7k-sincos.ll ARM: stop emitting blx instructions for most calls on MachO. 2016-05-10 19:17:47 +00:00
v8m-tail-call.ll [ARM] Change TCReturn to tBL if tailcall optimization fails. 2017-02-03 11:15:53 +00:00
v8m.base-jumptable_alignment.ll [CodeGen] fix alignment of JUMPTABLE_INSTS on v8M.base 2017-02-13 14:07:45 +00:00
va_arg.ll [ARM] Prefer BIC over BFC in ARM mode. 2017-04-07 22:01:23 +00:00
vaba.ll
…
vabd.ll
…
vabs.ll [ARM][NEON] Add support for ISD::ABS lowering 2017-05-08 10:37:34 +00:00
vadd.ll
…
vararg_no_start.ll
…
varargs-spill-stack-align-nacl.ll
…
vargs.ll
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vargs_align.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
vbits.ll [DAG] add splat vector support for 'xor' in SimplifyDemandedBits 2017-04-19 21:23:09 +00:00
vbsl-constant.ll
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vbsl.ll
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vceq.ll
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vcge.ll
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vcgt.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
vcmp-crash.ll [ARM] Fix crash caused by r294945 2017-02-13 17:18:00 +00:00
vcnt.ll [ARM] Expand vector ctlz_zero_undef so it becomes ctlz. 2016-04-26 05:04:37 +00:00
vcombine.ll [DAGCombiner] use narrow load to avoid vector extract 2017-05-27 14:07:03 +00:00
vcvt-cost.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
vcvt-v8.ll
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vcvt.ll Revert r312724 ("[ARM] Remove redundant vcvt patterns."). 2017-09-25 22:07:33 +00:00
vcvt_combine.ll
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vdiv_combine.ll
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vdup.ll DAG: Avoid OOB when legalizing vector indexing 2017-01-10 22:02:30 +00:00
vector-DAGCombine.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
vector-extend-narrow.ll
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vector-load.ll ARM: handle post-indexed NEON ops where the offset isn't the access width. 2017-04-20 19:54:02 +00:00
vector-promotion.ll Don't conditionalize Neon instructions, even in IT blocks. 2017-06-22 12:11:38 +00:00
vector-spilling.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
vector-store.ll ARM: handle post-indexed NEON ops where the offset isn't the access width. 2017-04-20 19:54:02 +00:00
vext.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
vfcmp.ll
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vfloatintrinsics.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
vfp-libcalls.ll ARM: stop emitting blx instructions for most calls on MachO. 2016-05-10 19:17:47 +00:00
vfp-reg-stride.ll
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vfp-regs-dwarf.ll [PR27284] Reverse the ownership between DICompileUnit and DISubprogram. 2016-04-15 15:57:41 +00:00
vfp.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
vget_lane.ll
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vhadd.ll
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vhsub.ll
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vicmp-64.ll Improve ARM lowering for "icmp <2 x i64> eq". 2016-10-18 21:03:40 +00:00
vicmp.ll
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virtregrewriter-subregliveness.mir [VirtRegRewriter] Properly model the register liveness on undef subreg definition 2017-08-16 00:17:05 +00:00
vld-vst-upgrade.ll
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vld1.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
vld2.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
vld3.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
vld4.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
vlddup.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
vldlane.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
vldm-liveness.ll [ARM] Check correct instructions for load/store rescheduling. 2017-03-01 22:56:20 +00:00
vldm-liveness.mir [ARM] Check correct instructions for load/store rescheduling. 2017-03-01 22:56:20 +00:00
vldm-sched-a9.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
vminmax.ll [CodeGen] Teach LLVM how to lower @llvm.{min,max}num to {MIN,MAX}NAN 2016-04-14 07:13:24 +00:00
vminmaxnm-safe.ll
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vminmaxnm.ll
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vmla.ll
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vmls.ll
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vmov.ll
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vmul.ll [ARM] Add ARMISD::VLD1DUP to match vld1_dup more consistently. 2016-12-16 18:44:08 +00:00
vneg.ll
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vpadal.ll
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vpadd.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
vpminmax.ll
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vqadd.ll
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vqdmul.ll
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vqshl.ll
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vqshrn.ll
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vqsub.ll
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vrec.ll
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vrev.ll
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vsel.ll [ARM] Use VCMP, not VCMPE, for floating point equality comparisons 2017-02-13 12:32:47 +00:00
vselect_imax.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
vshift.ll
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vshiftins.ll
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vshl.ll
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vshll.ll [SelectionDAG] Teach simplifyDemandedBits to handle shifts by constant splat vectors 2017-09-25 19:26:08 +00:00
vshrn.ll
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vsra.ll
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vst1.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
vst2.ll
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vst3.ll
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vst4.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
vstlane.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
vsub.ll
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vtbl.ll [ARM] Use TableGen patterns to select vtbl. NFC. 2017-04-19 20:39:39 +00:00
vtrn.ll [ARM] More aggressive matching for vpadd and vpaddl. 2017-01-11 19:33:38 +00:00
vuzp.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
vzip.ll [ARM] Check the right order for halves of VZIP/VUZP if both parts are used 2017-08-19 19:47:48 +00:00
warn-stack.ll [ARM] Generate consistent frame records for Thumb2 2016-08-23 09:19:22 +00:00
weak.ll
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weak2.ll
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wide-compares.ll [ARM] Avoid creating duplicate ANDs in SelectionDAG 2017-08-22 11:02:45 +00:00
widen-vmovs.ll [ARM] Do not test for CPUs, use SubtargetFeatures. Also remove 2 flags. 2016-07-06 11:22:11 +00:00
wrong-t2stmia-size-opt.ll
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xray-armv6-attribute-instrumentation.ll [XRay][CodeGen] Use PIC-friendly code in XRay sleds and remove synthetic references in .text 2017-09-04 05:34:58 +00:00
xray-armv7-attribute-instrumentation.ll [XRay][CodeGen] Use PIC-friendly code in XRay sleds and remove synthetic references in .text 2017-09-04 05:34:58 +00:00
xray-tail-call-sled.ll [xray] Add XRay support for Mach-O in CodeGen 2016-11-23 02:07:04 +00:00
zero-cycle-zero.ll [LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC. 2016-04-19 23:51:52 +00:00
zextload_demandedbits.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00