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AArch64
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Fix some misc. -enable-var-scope violations
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2017-11-13 01:47:52 +00:00 |
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AMDGPU
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AMDGPU: Fix multi-use shl/add combine
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2017-11-13 05:11:54 +00:00 |
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ARC
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ARM
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[GlobalISel] Enable legalizing non-power-of-2 sized types.
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2017-11-07 10:34:34 +00:00 |
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AVR
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[AVR] Fix the select-mbb-placement-bug.ll
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2017-10-20 04:17:14 +00:00 |
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BPF
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bpf: fix bug on silently truncating 64-bit immediate
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2017-10-16 04:14:53 +00:00 |
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Generic
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Add an @llvm.sideeffect intrinsic
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2017-11-08 21:59:51 +00:00 |
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Hexagon
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[Hexagon] Prefer L2_loadrub_io over L4_loadrub_rr
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2017-11-02 21:56:59 +00:00 |
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Inputs
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Lanai
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MIR: Print the register class or bank in vreg defs
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2017-10-24 18:04:54 +00:00 |
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MIR
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[MIRPrinter] Use %subreg.xxx syntax for subregister index operands
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2017-11-06 21:46:06 +00:00 |
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MSP430
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Mips
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[mips] Correct microMIP's jump and add unconditional branch pseudo
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2017-11-09 16:02:18 +00:00 |
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NVPTX
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[NVPTX] Implement __nvvm_atom_add_gen_d builtin.
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2017-11-07 22:10:54 +00:00 |
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Nios2
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PowerPC
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Use new vector insert half-word and byte instructions when we see insertelement on '8 x i16' and '16 x i8' types. Also extended existing lit testcase to cover these cases.
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2017-11-07 20:55:43 +00:00 |
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RISCV
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[RISCV] Re-generate test/CodeGen/RISCV/alu32.ll using update_llc_test_checks.py
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2017-11-09 15:45:42 +00:00 |
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SPARC
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Revert "Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding""
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2017-10-03 16:59:13 +00:00 |
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SystemZ
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[RegAlloc, SystemZ] Increase number of LOCRs by passing "hard" regalloc hints.
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2017-11-10 08:46:26 +00:00 |
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Thumb
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[ARM] Dynamic stack alignment for 16-bit Thumb
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2017-10-22 11:56:35 +00:00 |
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Thumb2
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[ARM] Honor -mfloat-abi for libcall calling convention
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2017-10-26 21:42:32 +00:00 |
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WebAssembly
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[WebAssembly] Fix stack offsets of return values from call lowering.
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2017-11-10 16:26:04 +00:00 |
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WinEH
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Make x86 __ehhandler comdat if parent function is
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2017-10-20 17:04:43 +00:00 |
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X86
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[X86] Regenerate test. NFC
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2017-11-13 08:07:31 +00:00 |
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XCore
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[MC] Suppress .Lcfi labels when emitting textual assembly
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2017-10-10 00:57:36 +00:00 |
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