forked from OSchip/llvm-project
662 lines
26 KiB
LLVM
662 lines
26 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -indvars -dce -S -indvars-predicate-loops=0 | FileCheck %s
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; Provide legal integer types.
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target datalayout = "n8:16:32:64"
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@A = external global i32
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;; Convert a pre-increment check on the latch into a post increment check
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define i32 @pre_to_post_add() {
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; CHECK-LABEL: @pre_to_post_add(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i32 [[I]], 1
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; CHECK-NEXT: store i32 [[I]], i32* @A
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[I_NEXT]], 1001
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[LOOPEXIT:%.*]]
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; CHECK: loopexit:
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; CHECK-NEXT: ret i32 1000
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;
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entry:
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br label %loop
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loop:
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%i = phi i32 [ 0, %entry ], [ %i.next, %loop ]
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%i.next = add i32 %i, 1
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store i32 %i, i32* @A
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%c = icmp slt i32 %i, 1000
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br i1 %c, label %loop, label %loopexit
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loopexit:
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ret i32 %i
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}
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; TODO: we should be able to convert the subtract into a post-decrement check
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define i32 @pre_to_post_sub() {
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; CHECK-LABEL: @pre_to_post_sub(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[I:%.*]] = phi i32 [ 1000, [[ENTRY:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[I_NEXT]] = sub nsw i32 [[I]], 1
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; CHECK-NEXT: store i32 [[I]], i32* @A
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; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[I]], 0
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; CHECK-NEXT: br i1 [[C]], label [[LOOP]], label [[LOOPEXIT:%.*]]
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; CHECK: loopexit:
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; CHECK-NEXT: ret i32 0
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;
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entry:
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br label %loop
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loop:
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%i = phi i32 [ 1000, %entry ], [ %i.next, %loop ]
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%i.next = sub i32 %i, 1
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store i32 %i, i32* @A
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%c = icmp sgt i32 %i, 0
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br i1 %c, label %loop, label %loopexit
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loopexit:
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ret i32 %i
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}
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; LFTR should eliminate the need for the computation of i*i completely. It
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; is only used to compute the exit value.
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define i32 @quadratic_slt() {
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; CHECK-LABEL: @quadratic_slt(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[I:%.*]] = phi i32 [ 7, [[ENTRY:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i32 [[I]], 1
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; CHECK-NEXT: store i32 [[I]], i32* @A
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[I_NEXT]], 33
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[LOOPEXIT:%.*]]
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; CHECK: loopexit:
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; CHECK-NEXT: ret i32 32
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;
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entry:
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br label %loop
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loop:
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%i = phi i32 [ 7, %entry ], [ %i.next, %loop ]
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%i.next = add i32 %i, 1
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store i32 %i, i32* @A
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%i2 = mul i32 %i, %i
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%c = icmp slt i32 %i2, 1000
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br i1 %c, label %loop, label %loopexit
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loopexit:
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ret i32 %i
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}
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; Same as previous but with sle test
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define i32 @quadratic_sle() {
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; CHECK-LABEL: @quadratic_sle(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[I:%.*]] = phi i32 [ 7, [[ENTRY:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i32 [[I]], 1
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; CHECK-NEXT: store i32 [[I]], i32* @A
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[I_NEXT]], 33
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[LOOPEXIT:%.*]]
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; CHECK: loopexit:
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; CHECK-NEXT: ret i32 32
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;
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entry:
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br label %loop
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loop:
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%i = phi i32 [ 7, %entry ], [ %i.next, %loop ]
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%i.next = add i32 %i, 1
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store i32 %i, i32* @A
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%i2 = mul i32 %i, %i
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%c = icmp sle i32 %i2, 1000
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br i1 %c, label %loop, label %loopexit
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loopexit:
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ret i32 %i
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}
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; Same as previous but with ule test
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define i32 @quadratic_ule() {
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; CHECK-LABEL: @quadratic_ule(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[I:%.*]] = phi i32 [ 7, [[ENTRY:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i32 [[I]], 1
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; CHECK-NEXT: store i32 [[I]], i32* @A
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[I_NEXT]], 33
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[LOOPEXIT:%.*]]
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; CHECK: loopexit:
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; CHECK-NEXT: ret i32 32
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;
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entry:
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br label %loop
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loop:
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%i = phi i32 [ 7, %entry ], [ %i.next, %loop ]
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%i.next = add i32 %i, 1
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store i32 %i, i32* @A
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%i2 = mul i32 %i, %i
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%c = icmp ule i32 %i2, 1000
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br i1 %c, label %loop, label %loopexit
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loopexit:
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ret i32 %i
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}
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define i32 @quadratic_sgt_loopdec() {
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; CHECK-LABEL: @quadratic_sgt_loopdec(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[I:%.*]] = phi i32 [ 10, [[ENTRY:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[I_NEXT]] = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 [[I]], i32 1)
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; CHECK-NEXT: store i32 [[I]], i32* @A
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; CHECK-NEXT: [[I2:%.*]] = mul i32 [[I]], [[I]]
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp sgt i32 [[I2]], 0
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[LOOPEXIT:%.*]]
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; CHECK: loopexit:
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; CHECK-NEXT: ret i32 0
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entry:
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br label %loop
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loop:
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%i = phi i32 [ 10, %entry ], [ %i.next, %loop ]
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%i.next = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %i, i32 1)
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store i32 %i, i32* @A
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%i2 = mul i32 %i, %i
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%c = icmp sgt i32 %i2, 0
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br i1 %c, label %loop, label %loopexit
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loopexit:
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ret i32 %i
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}
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@data = common global [240 x i8] zeroinitializer, align 16
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define void @test_zext(i8* %a) #0 {
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; CHECK-LABEL: @test_zext(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[P_0:%.*]] = phi i8* [ getelementptr inbounds ([240 x i8], [240 x i8]* @data, i64 0, i64 0), [[ENTRY:%.*]] ], [ [[TMP3:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[DOT0:%.*]] = phi i8* [ [[A:%.*]], [[ENTRY]] ], [ [[TMP:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[TMP]] = getelementptr inbounds i8, i8* [[DOT0]], i64 1
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; CHECK-NEXT: [[TMP2:%.*]] = load i8, i8* [[DOT0]], align 1
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; CHECK-NEXT: [[TMP3]] = getelementptr inbounds i8, i8* [[P_0]], i64 1
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; CHECK-NEXT: store i8 [[TMP2]], i8* [[P_0]], align 1
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i8* [[P_0]], getelementptr inbounds ([240 x i8], [240 x i8]* @data, i64 0, i64 239)
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop:
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%i.0 = phi i8 [ 0, %entry ], [ %tmp4, %loop ]
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%p.0 = phi i8* [ getelementptr inbounds ([240 x i8], [240 x i8]* @data, i64 0, i64 0), %entry ], [ %tmp3, %loop ]
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%.0 = phi i8* [ %a, %entry ], [ %tmp, %loop ]
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%tmp = getelementptr inbounds i8, i8* %.0, i64 1
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%tmp2 = load i8, i8* %.0, align 1
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%tmp3 = getelementptr inbounds i8, i8* %p.0, i64 1
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store i8 %tmp2, i8* %p.0, align 1
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%tmp4 = add i8 %i.0, 1
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%tmp5 = icmp ult i8 %tmp4, -16
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br i1 %tmp5, label %loop, label %exit
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exit:
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ret void
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}
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; It is okay to do LFTR on this loop even though the trip count is a
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; division because in this case the division can be optimized to a
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; shift.
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define void @test_udiv_as_shift(i8* %a, i8 %n) nounwind uwtable ssp {
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; CHECK-LABEL: @test_udiv_as_shift(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[E:%.*]] = icmp sgt i8 [[N:%.*]], 3
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; CHECK-NEXT: br i1 [[E]], label [[LOOP_PREHEADER:%.*]], label [[EXIT:%.*]]
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; CHECK: loop.preheader:
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; CHECK-NEXT: [[TMP0:%.*]] = add i8 [[N]], 3
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; CHECK-NEXT: [[TMP1:%.*]] = lshr i8 [[TMP0]], 2
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; CHECK-NEXT: [[TMP2:%.*]] = add nuw nsw i8 [[TMP1]], 1
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[I1:%.*]] = phi i8 [ [[I1_INC:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
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; CHECK-NEXT: [[I1_INC]] = add nuw nsw i8 [[I1]], 1
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; CHECK-NEXT: store volatile i8 0, i8* [[A:%.*]]
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i8 [[I1_INC]], [[TMP2]]
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
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; CHECK: exit.loopexit:
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%e = icmp sgt i8 %n, 3
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br i1 %e, label %loop, label %exit
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loop:
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%i = phi i8 [ 0, %entry ], [ %i.inc, %loop ]
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%i1 = phi i8 [ 0, %entry ], [ %i1.inc, %loop ]
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%i.inc = add nsw i8 %i, 4
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%i1.inc = add i8 %i1, 1
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store volatile i8 0, i8* %a
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%c = icmp slt i8 %i, %n
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br i1 %c, label %loop, label %exit
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exit:
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ret void
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}
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; Don't RAUW the loop's original comparison instruction if it has other uses
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; which aren't dominated by the new comparison instruction (which we insert
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; at the branch user).
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define void @use_before_branch() {
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; CHECK-LABEL: @use_before_branch(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOPENTRY_0:%.*]]
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; CHECK: loopentry.0:
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; CHECK-NEXT: [[MB_Y_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP_152:%.*]], [[LOOPENTRY_1:%.*]] ]
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; CHECK-NEXT: [[TMP_14:%.*]] = icmp ule i32 [[MB_Y_0]], 3
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; CHECK-NEXT: br i1 [[TMP_14]], label [[LOOPENTRY_1]], label [[LOOPEXIT_0:%.*]]
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; CHECK: loopentry.1:
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; CHECK-NEXT: [[TMP_152]] = add nuw nsw i32 [[MB_Y_0]], 2
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; CHECK-NEXT: br label [[LOOPENTRY_0]]
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; CHECK: loopexit.0:
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; CHECK-NEXT: unreachable
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;
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entry:
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br label %loopentry.0
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loopentry.0:
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%mb_y.0 = phi i32 [ 0, %entry ], [ %tmp.152, %loopentry.1 ]
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%tmp.14 = icmp sle i32 %mb_y.0, 3
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%tmp.15 = zext i1 %tmp.14 to i32
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br i1 %tmp.14, label %loopentry.1, label %loopexit.0
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loopentry.1:
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%tmp.152 = add i32 %mb_y.0, 2
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br label %loopentry.0
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loopexit.0: ; preds = %loopentry.0
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unreachable
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}
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@.str3 = private constant [6 x i8] c"%lld\0A\00", align 1
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declare i32 @printf(i8* noalias nocapture, ...) nounwind
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; PR13371: indvars pass incorrectly substitutes 'undef' values
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;
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; LFTR should not user %undef as the loop counter.
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define i64 @no_undef_counter() nounwind {
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; CHECK-LABEL: @no_undef_counter(
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; CHECK-NEXT: func_start:
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; CHECK-NEXT: br label [[BLOCK9:%.*]]
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; CHECK: block9:
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; CHECK-NEXT: [[UNDEF:%.*]] = phi i64 [ [[NEXT_UNDEF:%.*]], [[BLOCK9]] ], [ undef, [[FUNC_START:%.*]] ]
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; CHECK-NEXT: [[ITER:%.*]] = phi i64 [ [[NEXT_ITER:%.*]], [[BLOCK9]] ], [ 1, [[FUNC_START]] ]
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; CHECK-NEXT: [[NEXT_ITER]] = add nuw nsw i64 [[ITER]], 1
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; CHECK-NEXT: [[TMP0:%.*]] = tail call i32 (i8*, ...) @printf(i8* noalias nocapture getelementptr inbounds ([6 x i8], [6 x i8]* @.str3, i64 0, i64 0), i64 [[NEXT_ITER]], i64 [[UNDEF]])
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; CHECK-NEXT: [[NEXT_UNDEF]] = add nsw i64 [[UNDEF]], 1
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[NEXT_ITER]], 100
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[BLOCK9]], label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: ret i64 0
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;
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func_start:
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br label %block9
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block9: ; preds = %block9,%func_start
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%undef = phi i64 [ %next_undef, %block9 ], [ undef, %func_start ]
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%iter = phi i64 [ %next_iter, %block9 ], [ 1, %func_start ]
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%next_iter = add nsw i64 %iter, 1
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%0 = tail call i32 (i8*, ...) @printf(i8* noalias nocapture getelementptr inbounds ([6 x i8], [6 x i8]* @.str3, i64 0, i64 0), i64 %next_iter, i64 %undef)
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%next_undef = add nsw i64 %undef, 1
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%_tmp_3 = icmp slt i64 %next_iter, 100
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br i1 %_tmp_3, label %block9, label %exit
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exit: ; preds = %block9
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ret i64 0
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}
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define void @extend_const() #0 {
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; CHECK-LABEL: @extend_const(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[FOR_BODY:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i32 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ], [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: call void @bar(i32 [[INDVARS_IV]]) #2
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; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i32 [[INDVARS_IV]], 1
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[INDVARS_IV_NEXT]], 512
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END:%.*]]
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; CHECK: for.end:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %for.body
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for.body: ; preds = %entry, %for.body
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%i.01 = phi i16 [ 0, %entry ], [ %inc, %for.body ]
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%conv2 = sext i16 %i.01 to i32
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call void @bar(i32 %conv2) #1
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%inc = add i16 %i.01, 1
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%cmp = icmp slt i16 %inc, 512
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br i1 %cmp, label %for.body, label %for.end
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for.end: ; preds = %for.body
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ret void
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}
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; Check that post-incrementing the backedge taken count does not overflow.
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define i32 @extend_const_postinc() #0 {
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; CHECK-LABEL: @extend_const_postinc(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[DO_BODY:%.*]]
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; CHECK: do.body:
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i32 [ [[INDVARS_IV_NEXT:%.*]], [[DO_BODY]] ], [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: call void @bar(i32 [[INDVARS_IV]]) #2
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[INDVARS_IV]], 255
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; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i32 [[INDVARS_IV]], 1
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; CHECK-NEXT: br i1 [[CMP]], label [[DO_END:%.*]], label [[DO_BODY]]
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; CHECK: do.end:
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; CHECK-NEXT: ret i32 0
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;
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entry:
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br label %do.body
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do.body: ; preds = %do.body, %entry
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%first.0 = phi i8 [ 0, %entry ], [ %inc, %do.body ]
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%conv = zext i8 %first.0 to i32
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call void @bar(i32 %conv) #1
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%inc = add i8 %first.0, 1
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%cmp = icmp eq i8 %first.0, -1
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br i1 %cmp, label %do.end, label %do.body
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do.end: ; preds = %do.body
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ret i32 0
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}
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declare void @bar(i32)
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attributes #0 = { nounwind uwtable }
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attributes #1 = { nounwind }
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; With the given initial value for IV, it is not legal to widen
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; trip count to IV size
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define void @wide_trip_count_test1(float* %autoc,
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; CHECK-LABEL: @wide_trip_count_test1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[DATA_LEN:%.*]], [[SAMPLE:%.*]]
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|
; CHECK-NEXT: [[CMP4:%.*]] = icmp eq i32 [[DATA_LEN]], [[SAMPLE]]
|
|
; CHECK-NEXT: br i1 [[CMP4]], label [[FOR_END:%.*]], label [[FOR_BODY_PREHEADER:%.*]]
|
|
; CHECK: for.body.preheader:
|
|
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
|
|
; CHECK: for.body:
|
|
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ], [ 68719476736, [[FOR_BODY_PREHEADER]] ]
|
|
; CHECK-NEXT: [[TEMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
|
|
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[TEMP]], [[SAMPLE]]
|
|
; CHECK-NEXT: [[IDXPROM:%.*]] = zext i32 [[ADD]] to i64
|
|
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, float* [[DATA:%.*]], i64 [[IDXPROM]]
|
|
; CHECK-NEXT: [[TEMP1:%.*]] = load float, float* [[ARRAYIDX]], align 4
|
|
; CHECK-NEXT: [[MUL:%.*]] = fmul float [[TEMP1]], [[D:%.*]]
|
|
; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, float* [[AUTOC:%.*]], i64 [[INDVARS_IV]]
|
|
; CHECK-NEXT: [[TEMP2:%.*]] = load float, float* [[ARRAYIDX2]], align 4
|
|
; CHECK-NEXT: [[ADD3:%.*]] = fadd float [[TEMP2]], [[MUL]]
|
|
; CHECK-NEXT: store float [[ADD3]], float* [[ARRAYIDX2]], align 4
|
|
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
|
|
; CHECK-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
|
|
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[LFTR_WIDEIV]], [[SUB]]
|
|
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
|
|
; CHECK: for.end.loopexit:
|
|
; CHECK-NEXT: br label [[FOR_END]]
|
|
; CHECK: for.end:
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
float* %data,
|
|
float %d, i32 %data_len, i32 %sample) nounwind {
|
|
entry:
|
|
%sub = sub i32 %data_len, %sample
|
|
%cmp4 = icmp eq i32 %data_len, %sample
|
|
br i1 %cmp4, label %for.end, label %for.body
|
|
|
|
for.body: ; preds = %entry, %for.body
|
|
%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 68719476736, %entry ]
|
|
%temp = trunc i64 %indvars.iv to i32
|
|
%add = add i32 %temp, %sample
|
|
%idxprom = zext i32 %add to i64
|
|
%arrayidx = getelementptr inbounds float, float* %data, i64 %idxprom
|
|
%temp1 = load float, float* %arrayidx, align 4
|
|
%mul = fmul float %temp1, %d
|
|
%arrayidx2 = getelementptr inbounds float, float* %autoc, i64 %indvars.iv
|
|
%temp2 = load float, float* %arrayidx2, align 4
|
|
%add3 = fadd float %temp2, %mul
|
|
store float %add3, float* %arrayidx2, align 4
|
|
%indvars.iv.next = add i64 %indvars.iv, 1
|
|
%temp3 = trunc i64 %indvars.iv.next to i32
|
|
%cmp = icmp ult i32 %temp3, %sub
|
|
br i1 %cmp, label %for.body, label %for.end
|
|
|
|
for.end: ; preds = %for.body, %entry
|
|
ret void
|
|
}
|
|
|
|
; Trip count should be widened and LFTR should canonicalize the condition
|
|
define float @wide_trip_count_test2(float* %a,
|
|
; CHECK-LABEL: @wide_trip_count_test2(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: [[CMP5:%.*]] = icmp ugt i32 [[M:%.*]], 500
|
|
; CHECK-NEXT: br i1 [[CMP5]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
|
|
; CHECK: for.body.preheader:
|
|
; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[M]] to i64
|
|
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
|
|
; CHECK: for.body:
|
|
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ], [ 500, [[FOR_BODY_PREHEADER]] ]
|
|
; CHECK-NEXT: [[SUM_07:%.*]] = phi float [ [[ADD:%.*]], [[FOR_BODY]] ], [ 0.000000e+00, [[FOR_BODY_PREHEADER]] ]
|
|
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 [[INDVARS_IV]]
|
|
; CHECK-NEXT: [[TEMP:%.*]] = load float, float* [[ARRAYIDX]], align 4
|
|
; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, float* [[A:%.*]], i64 [[INDVARS_IV]]
|
|
; CHECK-NEXT: [[TEMP1:%.*]] = load float, float* [[ARRAYIDX2]], align 4
|
|
; CHECK-NEXT: [[MUL:%.*]] = fmul float [[TEMP]], [[TEMP1]]
|
|
; CHECK-NEXT: [[ADD]] = fadd float [[SUM_07]], [[MUL]]
|
|
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
|
|
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
|
|
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
|
|
; CHECK: for.end.loopexit:
|
|
; CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi float [ [[ADD]], [[FOR_BODY]] ]
|
|
; CHECK-NEXT: br label [[FOR_END]]
|
|
; CHECK: for.end:
|
|
; CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi float [ 0.000000e+00, [[ENTRY:%.*]] ], [ [[ADD_LCSSA]], [[FOR_END_LOOPEXIT]] ]
|
|
; CHECK-NEXT: ret float [[SUM_0_LCSSA]]
|
|
;
|
|
float* %b,
|
|
i32 zeroext %m) local_unnamed_addr #0 {
|
|
entry:
|
|
%cmp5 = icmp ugt i32 %m, 500
|
|
br i1 %cmp5, label %for.body.preheader, label %for.end
|
|
|
|
for.body.preheader: ; preds = %entry
|
|
br label %for.body
|
|
|
|
for.body: ; preds = %for.body.preheader, %for.body
|
|
%sum.07 = phi float [ %add, %for.body ], [ 0.000000e+00, %for.body.preheader ]
|
|
%i.06 = phi i32 [ %inc, %for.body ], [ 500, %for.body.preheader ]
|
|
%idxprom = zext i32 %i.06 to i64
|
|
%arrayidx = getelementptr inbounds float, float* %b, i64 %idxprom
|
|
%temp = load float, float* %arrayidx, align 4
|
|
%arrayidx2 = getelementptr inbounds float, float* %a, i64 %idxprom
|
|
%temp1 = load float, float* %arrayidx2, align 4
|
|
%mul = fmul float %temp, %temp1
|
|
%add = fadd float %sum.07, %mul
|
|
%inc = add i32 %i.06, 1
|
|
%cmp = icmp ult i32 %inc, %m
|
|
br i1 %cmp, label %for.body, label %for.end.loopexit
|
|
|
|
for.end.loopexit: ; preds = %for.body
|
|
br label %for.end
|
|
|
|
for.end: ; preds = %for.end.loopexit, %entry
|
|
%sum.0.lcssa = phi float [ 0.000000e+00, %entry ], [ %add, %for.end.loopexit ]
|
|
ret float %sum.0.lcssa
|
|
}
|
|
|
|
; Trip count should be widened and LFTR should canonicalize the condition
|
|
define float @wide_trip_count_test3(float* %b,
|
|
; CHECK-LABEL: @wide_trip_count_test3(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[M:%.*]], -10
|
|
; CHECK-NEXT: br i1 [[CMP5]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
|
|
; CHECK: for.body.preheader:
|
|
; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = sext i32 [[M]] to i64
|
|
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
|
|
; CHECK: for.body:
|
|
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ], [ -10, [[FOR_BODY_PREHEADER]] ]
|
|
; CHECK-NEXT: [[SUM_07:%.*]] = phi float [ [[ADD1:%.*]], [[FOR_BODY]] ], [ 0.000000e+00, [[FOR_BODY_PREHEADER]] ]
|
|
; CHECK-NEXT: [[TMP0:%.*]] = add nsw i64 [[INDVARS_IV]], 20
|
|
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 [[TMP0]]
|
|
; CHECK-NEXT: [[TEMP:%.*]] = load float, float* [[ARRAYIDX]], align 4
|
|
; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[INDVARS_IV]] to i32
|
|
; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to float
|
|
; CHECK-NEXT: [[MUL:%.*]] = fmul float [[CONV]], [[TEMP]]
|
|
; CHECK-NEXT: [[ADD1]] = fadd float [[SUM_07]], [[MUL]]
|
|
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
|
|
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
|
|
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
|
|
; CHECK: for.end.loopexit:
|
|
; CHECK-NEXT: [[ADD1_LCSSA:%.*]] = phi float [ [[ADD1]], [[FOR_BODY]] ]
|
|
; CHECK-NEXT: br label [[FOR_END]]
|
|
; CHECK: for.end:
|
|
; CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi float [ 0.000000e+00, [[ENTRY:%.*]] ], [ [[ADD1_LCSSA]], [[FOR_END_LOOPEXIT]] ]
|
|
; CHECK-NEXT: ret float [[SUM_0_LCSSA]]
|
|
;
|
|
i32 signext %m) local_unnamed_addr #0 {
|
|
entry:
|
|
%cmp5 = icmp sgt i32 %m, -10
|
|
br i1 %cmp5, label %for.body.preheader, label %for.end
|
|
|
|
for.body.preheader: ; preds = %entry
|
|
br label %for.body
|
|
|
|
for.body: ; preds = %for.body.preheader, %for.body
|
|
%sum.07 = phi float [ %add1, %for.body ], [ 0.000000e+00, %for.body.preheader ]
|
|
%i.06 = phi i32 [ %inc, %for.body ], [ -10, %for.body.preheader ]
|
|
%add = add nsw i32 %i.06, 20
|
|
%idxprom = sext i32 %add to i64
|
|
%arrayidx = getelementptr inbounds float, float* %b, i64 %idxprom
|
|
%temp = load float, float* %arrayidx, align 4
|
|
%conv = sitofp i32 %i.06 to float
|
|
%mul = fmul float %conv, %temp
|
|
%add1 = fadd float %sum.07, %mul
|
|
%inc = add nsw i32 %i.06, 1
|
|
%cmp = icmp slt i32 %inc, %m
|
|
br i1 %cmp, label %for.body, label %for.end.loopexit
|
|
|
|
for.end.loopexit: ; preds = %for.body
|
|
br label %for.end
|
|
|
|
for.end: ; preds = %for.end.loopexit, %entry
|
|
%sum.0.lcssa = phi float [ 0.000000e+00, %entry ], [ %add1, %for.end.loopexit ]
|
|
ret float %sum.0.lcssa
|
|
}
|
|
|
|
; Trip count should be widened and LFTR should canonicalize the condition
|
|
define float @wide_trip_count_test4(float* %b,
|
|
; CHECK-LABEL: @wide_trip_count_test4(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[M:%.*]], 10
|
|
; CHECK-NEXT: br i1 [[CMP5]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
|
|
; CHECK: for.body.preheader:
|
|
; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[M]] to i64
|
|
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
|
|
; CHECK: for.body:
|
|
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ], [ 10, [[FOR_BODY_PREHEADER]] ]
|
|
; CHECK-NEXT: [[SUM_07:%.*]] = phi float [ [[ADD1:%.*]], [[FOR_BODY]] ], [ 0.000000e+00, [[FOR_BODY_PREHEADER]] ]
|
|
; CHECK-NEXT: [[TMP0:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 20
|
|
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 [[TMP0]]
|
|
; CHECK-NEXT: [[TEMP:%.*]] = load float, float* [[ARRAYIDX]], align 4
|
|
; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[INDVARS_IV]] to i32
|
|
; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to float
|
|
; CHECK-NEXT: [[MUL:%.*]] = fmul float [[CONV]], [[TEMP]]
|
|
; CHECK-NEXT: [[ADD1]] = fadd float [[SUM_07]], [[MUL]]
|
|
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
|
|
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
|
|
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
|
|
; CHECK: for.end.loopexit:
|
|
; CHECK-NEXT: [[ADD1_LCSSA:%.*]] = phi float [ [[ADD1]], [[FOR_BODY]] ]
|
|
; CHECK-NEXT: br label [[FOR_END]]
|
|
; CHECK: for.end:
|
|
; CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi float [ 0.000000e+00, [[ENTRY:%.*]] ], [ [[ADD1_LCSSA]], [[FOR_END_LOOPEXIT]] ]
|
|
; CHECK-NEXT: ret float [[SUM_0_LCSSA]]
|
|
;
|
|
i32 signext %m) local_unnamed_addr #0 {
|
|
entry:
|
|
%cmp5 = icmp sgt i32 %m, 10
|
|
br i1 %cmp5, label %for.body.preheader, label %for.end
|
|
|
|
for.body.preheader: ; preds = %entry
|
|
br label %for.body
|
|
|
|
for.body: ; preds = %for.body.preheader, %for.body
|
|
%sum.07 = phi float [ %add1, %for.body ], [ 0.000000e+00, %for.body.preheader ]
|
|
%i.06 = phi i32 [ %inc, %for.body ], [ 10, %for.body.preheader ]
|
|
%add = add nsw i32 %i.06, 20
|
|
%idxprom = sext i32 %add to i64
|
|
%arrayidx = getelementptr inbounds float, float* %b, i64 %idxprom
|
|
%temp = load float, float* %arrayidx, align 4
|
|
%conv = sitofp i32 %i.06 to float
|
|
%mul = fmul float %conv, %temp
|
|
%add1 = fadd float %sum.07, %mul
|
|
%inc = add nsw i32 %i.06, 1
|
|
%cmp = icmp slt i32 %inc, %m
|
|
br i1 %cmp, label %for.body, label %for.end.loopexit
|
|
|
|
for.end.loopexit: ; preds = %for.body
|
|
%add1.lcssa = phi float [ %add1, %for.body ]
|
|
br label %for.end
|
|
|
|
for.end: ; preds = %for.end.loopexit, %entry
|
|
%sum.0.lcssa = phi float [ 0.000000e+00, %entry ], [ %add1.lcssa, %for.end.loopexit ]
|
|
ret float %sum.0.lcssa
|
|
}
|
|
|
|
define void @ptr_non_cmp_exit_test() {
|
|
; CHECK-LABEL: @ptr_non_cmp_exit_test(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: br label [[FOR_BODY29:%.*]]
|
|
; CHECK: for.body29:
|
|
; CHECK-NEXT: [[IV:%.*]] = phi i8* [ null, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[FOR_BODY29]] ]
|
|
; CHECK-NEXT: [[TMP0:%.*]] = load volatile i8, i8* [[IV]], align 1
|
|
; CHECK-NEXT: [[IV_NEXT]] = getelementptr inbounds i8, i8* [[IV]], i64 1
|
|
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i8* [[IV]], inttoptr (i64 10 to i8*)
|
|
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY29]], label [[EXIT:%.*]]
|
|
; CHECK: exit:
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
entry:
|
|
br label %for.body29
|
|
|
|
for.body29:
|
|
%iv = phi i8* [ null, %entry ], [ %iv.next, %for.body29 ]
|
|
load volatile i8, i8* %iv, align 1
|
|
%iv.next = getelementptr inbounds i8, i8* %iv, i64 1
|
|
%cmp = icmp ne i8* %iv.next, inttoptr (i64 11 to i8*)
|
|
%and = and i1 %cmp, %cmp
|
|
br i1 %and, label %for.body29, label %exit
|
|
|
|
exit:
|
|
ret void
|
|
}
|
|
|
|
|
|
declare i32 @llvm.loop.decrement.reg.i32.i32.i32(i32, i32)
|
|
|