forked from OSchip/llvm-project
38 lines
1.5 KiB
TableGen
38 lines
1.5 KiB
TableGen
// RUN: llvm-tblgen -gen-global-isel -warn-on-skipped-patterns -optimize-match-table=false -I %p/../../include -I %p/Common %s -o - | FileCheck -check-prefix=GISEL %s
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include "llvm/Target/Target.td"
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include "GlobalISelEmitterCommon.td"
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def shiftl_1 : SDNodeXForm<timm, [{
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return CurDAG->getTargetConstant(N->getZExtValue() << 1, SDLoc(N), MVT::i32);
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}]>;
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def gi_shiftl_1 : GICustomOperandRenderer<"renderShiftImml1">,
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GISDNodeXFormEquiv<shiftl_1>;
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def int_mytarget_sleep : Intrinsic<[], [llvm_i32_ty], [ImmArg<0>]>;
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def int_mytarget_foo : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [ImmArg<1>, IntrNoMem]>;
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def SLEEP : I<(outs), (ins i32imm:$src0), []>;
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def FOO : I<(outs GPR32:$dst), (ins GPR32:$src0, i32imm:$src1), []>;
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// GISEL: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
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// GISEL: GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::mytarget_foo,
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// GISEL: GIM_CheckIsImm, /*MI*/0, /*Op*/3,
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// GISEL: GIR_CustomOperandRenderer, /*InsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, /*OperandRenderer*/GICR_renderShiftImml1, // src1
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def : Pat<
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(int_mytarget_foo i32:$src0, (i32 timm:$src1)),
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(FOO GPR32:$src0, (shiftl_1 $src1))
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>;
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// GISEL: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS,
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// GISEL: GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::mytarget_sleep,
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// GISEL: GIM_CheckIsImm, /*MI*/0, /*Op*/1,
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// GISEL: GIR_CustomOperandRenderer, /*InsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, /*OperandRenderer*/GICR_renderShiftImml1, // src0
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def : Pat<
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(int_mytarget_sleep (i32 timm:$src0)),
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(SLEEP (shiftl_1 $src0))
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>;
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