forked from OSchip/llvm-project
69 lines
2.5 KiB
LLVM
69 lines
2.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | FileCheck %s
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define void @test_x86_sse_storeu_ps(i8* %a0, <4 x float> %a1) {
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; CHECK-LABEL: test_x86_sse_storeu_ps:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movups %xmm0, (%eax)
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; CHECK-NEXT: retl
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call void @llvm.x86.sse.storeu.ps(i8* %a0, <4 x float> %a1)
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ret void
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}
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declare void @llvm.x86.sse.storeu.ps(i8*, <4 x float>) nounwind
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define <4 x float> @test_x86_sse_add_ss(<4 x float> %a0, <4 x float> %a1) {
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; CHECK-LABEL: test_x86_sse_add_ss:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: addss %xmm1, %xmm0
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; CHECK-NEXT: retl
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%res = call <4 x float> @llvm.x86.sse.add.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1]
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ret <4 x float> %res
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}
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declare <4 x float> @llvm.x86.sse.add.ss(<4 x float>, <4 x float>) nounwind readnone
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define <4 x float> @test_x86_sse_sub_ss(<4 x float> %a0, <4 x float> %a1) {
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; CHECK-LABEL: test_x86_sse_sub_ss:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: subss %xmm1, %xmm0
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; CHECK-NEXT: retl
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%res = call <4 x float> @llvm.x86.sse.sub.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1]
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ret <4 x float> %res
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}
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declare <4 x float> @llvm.x86.sse.sub.ss(<4 x float>, <4 x float>) nounwind readnone
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define <4 x float> @test_x86_sse_mul_ss(<4 x float> %a0, <4 x float> %a1) {
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; CHECK-LABEL: test_x86_sse_mul_ss:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: mulss %xmm1, %xmm0
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; CHECK-NEXT: retl
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%res = call <4 x float> @llvm.x86.sse.mul.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1]
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ret <4 x float> %res
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}
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declare <4 x float> @llvm.x86.sse.mul.ss(<4 x float>, <4 x float>) nounwind readnone
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define <4 x float> @test_x86_sse_div_ss(<4 x float> %a0, <4 x float> %a1) {
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; CHECK-LABEL: test_x86_sse_div_ss:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: divss %xmm1, %xmm0
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; CHECK-NEXT: retl
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%res = call <4 x float> @llvm.x86.sse.div.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1]
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ret <4 x float> %res
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}
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declare <4 x float> @llvm.x86.sse.div.ss(<4 x float>, <4 x float>) nounwind readnone
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define <4 x float> @test_x86_sse_cvtsi2ss(<4 x float> %a0, i32 %a1) {
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; CHECK-LABEL: test_x86_sse_cvtsi2ss:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: cvtsi2ssl {{[0-9]+}}(%esp), %xmm0
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; CHECK-NEXT: retl
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%res = call <4 x float> @llvm.x86.sse.cvtsi2ss(<4 x float> %a0, i32 %a1) ; <<4 x float>> [#uses=1]
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ret <4 x float> %res
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}
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declare <4 x float> @llvm.x86.sse.cvtsi2ss(<4 x float>, i32) nounwind readnone
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