forked from OSchip/llvm-project
38 lines
1.3 KiB
LLVM
38 lines
1.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -reassociate -S | FileCheck %s
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; Input is A op (B op C)
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define half @faddsubAssoc1(half %a, half %b) {
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; CHECK-LABEL: @faddsubAssoc1(
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; CHECK-NEXT: [[T2_NEG:%.*]] = fmul fast half [[A:%.*]], 0xH4500
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; CHECK-NEXT: [[REASS_MUL:%.*]] = fmul fast half [[B:%.*]], 0xH4500
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; CHECK-NEXT: [[T51:%.*]] = fsub fast half [[REASS_MUL]], [[T2_NEG]]
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; CHECK-NEXT: [[T5:%.*]] = fadd fast half [[REASS_MUL]], [[T2_NEG]]
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; CHECK-NEXT: ret half [[T51]]
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;
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%t1 = fmul fast half %b, 0xH4200 ; 3*b
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%t2 = fmul fast half %a, 0xH4500 ; 5*a
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%t3 = fmul fast half %b, 0xH4000 ; 2*b
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%t4 = fsub fast half %t2, %t1 ; 5 * a - 3 * b
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%t5 = fsub fast half %t3, %t4 ; 2 * b - ( 5 * a - 3 * b)
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ret half %t5 ; = 5 * (b - a)
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}
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; Input is (A op B) op C
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define half @faddsubAssoc2(half %a, half %b) {
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; CHECK-LABEL: @faddsubAssoc2(
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; CHECK-NEXT: [[T2:%.*]] = fmul fast half [[A:%.*]], 0xH4500
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; CHECK-NEXT: [[T5:%.*]] = fadd fast half [[B:%.*]], [[T2]]
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; CHECK-NEXT: ret half [[T5]]
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;
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%t1 = fmul fast half %b, 0xH4200 ; 3*b
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%t2 = fmul fast half %a, 0xH4500 ; 5*a
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%t3 = fmul fast half %b, 0xH4000 ; 2*b
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%t4 = fadd fast half %t2, %t1 ; 5 * a + 3 * b
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%t5 = fsub fast half %t4, %t3 ; (5 * a + 3 * b) - (2 * b)
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ret half %t5 ; = 5 * a + b
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}
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