forked from OSchip/llvm-project
111 lines
5.3 KiB
LLVM
111 lines
5.3 KiB
LLVM
; RUN: opt < %s -sroa -S | FileCheck %s
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;
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; Make sure the llvm.mem.parallel_loop_access meta-data is preserved
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; when a load/store is replaced with another load/store by sroa
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;
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; class Complex {
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; private:
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; float real_;
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; float imaginary_;
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;
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; public:
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; Complex() : real_(0), imaginary_(0) { }
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; Complex(float real, float imaginary) : real_(real), imaginary_(imaginary) { }
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; Complex(const Complex &rhs) : real_(rhs.real()), imaginary_(rhs.imaginary()) { }
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;
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; inline float real() const { return real_; }
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; inline float imaginary() const { return imaginary_; }
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;
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; Complex operator+(const Complex& rhs) const
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; {
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; return Complex(real_ + rhs.real_, imaginary_ + rhs.imaginary_);
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; }
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; };
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;
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; void test(Complex *out, long size)
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; {
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; #pragma clang loop vectorize(assume_safety)
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; for (long offset = 0; offset < size; ++offset) {
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; Complex t0 = out[offset];
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; out[offset] = t0 + t0;
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; }
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; }
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; CHECK: for.body:
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; CHECK-NOT: store i32 %{{.*}}, i32* %{{.*}}, align 4
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; CHECK: store i32 %{{.*}}, i32* %{{.*}}, align 4, !llvm.mem.parallel_loop_access !1
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; CHECK-NOT: store i32 %{{.*}}, i32* %{{.*}}, align 4
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; CHECK: store i32 %{{.*}}, i32* %{{.*}}, align 4, !llvm.mem.parallel_loop_access !1
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; CHECK-NOT: store i32 %{{.*}}, i32* %{{.*}}, align 4
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; CHECK: br label
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; ModuleID = '<stdin>'
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source_filename = "mem-par-metadata-sroa1.cpp"
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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%class.Complex = type { float, float }
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; Function Attrs: norecurse nounwind uwtable
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define void @_Z4testP7Complexl(%class.Complex* nocapture %out, i64 %size) local_unnamed_addr #0 {
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entry:
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%t0 = alloca %class.Complex, align 4
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%ref.tmp = alloca i64, align 8
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%tmpcast = bitcast i64* %ref.tmp to %class.Complex*
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br label %for.cond
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for.cond: ; preds = %for.body, %entry
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%offset.0 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
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%cmp = icmp slt i64 %offset.0, %size
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br i1 %cmp, label %for.body, label %for.end
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for.body: ; preds = %for.cond
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%arrayidx = getelementptr inbounds %class.Complex, %class.Complex* %out, i64 %offset.0
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%real_.i = getelementptr inbounds %class.Complex, %class.Complex* %t0, i64 0, i32 0
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%real_.i.i = getelementptr inbounds %class.Complex, %class.Complex* %arrayidx, i64 0, i32 0
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%0 = load float, float* %real_.i.i, align 4, !llvm.mem.parallel_loop_access !1
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store float %0, float* %real_.i, align 4, !llvm.mem.parallel_loop_access !1
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%imaginary_.i = getelementptr inbounds %class.Complex, %class.Complex* %t0, i64 0, i32 1
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%imaginary_.i.i = getelementptr inbounds %class.Complex, %class.Complex* %arrayidx, i64 0, i32 1
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%1 = load float, float* %imaginary_.i.i, align 4, !llvm.mem.parallel_loop_access !1
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store float %1, float* %imaginary_.i, align 4, !llvm.mem.parallel_loop_access !1
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%arrayidx1 = getelementptr inbounds %class.Complex, %class.Complex* %out, i64 %offset.0
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%real_.i1 = getelementptr inbounds %class.Complex, %class.Complex* %t0, i64 0, i32 0
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%2 = load float, float* %real_.i1, align 4, !noalias !3, !llvm.mem.parallel_loop_access !1
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%real_2.i = getelementptr inbounds %class.Complex, %class.Complex* %t0, i64 0, i32 0
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%3 = load float, float* %real_2.i, align 4, !noalias !3, !llvm.mem.parallel_loop_access !1
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%add.i = fadd float %2, %3
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%imaginary_.i2 = getelementptr inbounds %class.Complex, %class.Complex* %t0, i64 0, i32 1
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%4 = load float, float* %imaginary_.i2, align 4, !noalias !3, !llvm.mem.parallel_loop_access !1
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%imaginary_3.i = getelementptr inbounds %class.Complex, %class.Complex* %t0, i64 0, i32 1
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%5 = load float, float* %imaginary_3.i, align 4, !noalias !3, !llvm.mem.parallel_loop_access !1
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%add4.i = fadd float %4, %5
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%real_.i.i3 = getelementptr inbounds %class.Complex, %class.Complex* %tmpcast, i64 0, i32 0
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store float %add.i, float* %real_.i.i3, align 4, !alias.scope !3, !llvm.mem.parallel_loop_access !1
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%imaginary_.i.i4 = getelementptr inbounds %class.Complex, %class.Complex* %tmpcast, i64 0, i32 1
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store float %add4.i, float* %imaginary_.i.i4, align 4, !alias.scope !3, !llvm.mem.parallel_loop_access !1
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%6 = bitcast %class.Complex* %arrayidx1 to i64*
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%7 = load i64, i64* %ref.tmp, align 8, !llvm.mem.parallel_loop_access !1
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store i64 %7, i64* %6, align 4, !llvm.mem.parallel_loop_access !1
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%inc = add nsw i64 %offset.0, 1
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br label %for.cond, !llvm.loop !1
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for.end: ; preds = %for.cond
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ret void
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}
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; Function Attrs: argmemonly nounwind
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declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i1) #1
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attributes #0 = { norecurse nounwind uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #1 = { argmemonly nounwind }
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!llvm.ident = !{!0}
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!0 = !{!"clang version 4.0.0 (cfe/trunk 277751)"}
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!1 = distinct !{!1, !2}
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!2 = !{!"llvm.loop.vectorize.enable", i1 true}
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!3 = !{!4}
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!4 = distinct !{!4, !5, !"_ZNK7ComplexplERKS_: %agg.result"}
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!5 = distinct !{!5, !"_ZNK7ComplexplERKS_"}
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