forked from OSchip/llvm-project
134 lines
5.0 KiB
LLVM
134 lines
5.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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define i64 @zext(i32 %x, i32 %y, i32 %z) {
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; CHECK-LABEL: @zext(
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 0, i32 [[Z:%.*]]
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; CHECK-NEXT: [[R:%.*]] = zext i32 [[SEL]] to i64
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; CHECK-NEXT: ret i64 [[R]]
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;
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%cmp = icmp eq i32 %x, %y
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%sel = select i1 %cmp, i32 0, i32 %z
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%r = zext i32 %sel to i64
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ret i64 %r
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}
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define <2 x i32> @zext_vec(<2 x i8> %x, <2 x i8> %y, <2 x i8> %z) {
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; CHECK-LABEL: @zext_vec(
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; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i8> [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[Z:%.*]], <2 x i8> <i8 42, i8 7>
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; CHECK-NEXT: [[R:%.*]] = zext <2 x i8> [[SEL]] to <2 x i32>
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; CHECK-NEXT: ret <2 x i32> [[R]]
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;
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%cmp = icmp ugt <2 x i8> %x, %y
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%sel = select <2 x i1> %cmp, <2 x i8> %z, <2 x i8> <i8 42, i8 7>
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%r = zext <2 x i8> %sel to <2 x i32>
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ret <2 x i32> %r
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}
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define i64 @sext(i8 %x, i8 %y, i8 %z) {
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; CHECK-LABEL: @sext(
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 42, i8 [[Z:%.*]]
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; CHECK-NEXT: [[R:%.*]] = sext i8 [[SEL]] to i64
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; CHECK-NEXT: ret i64 [[R]]
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;
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%cmp = icmp ult i8 %x, %y
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%sel = select i1 %cmp, i8 42, i8 %z
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%r = sext i8 %sel to i64
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ret i64 %r
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}
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define <2 x i32> @sext_vec(<2 x i8> %x, <2 x i8> %y, <2 x i8> %z) {
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; CHECK-LABEL: @sext_vec(
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; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i8> [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[Z:%.*]], <2 x i8> <i8 42, i8 7>
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; CHECK-NEXT: [[R:%.*]] = sext <2 x i8> [[SEL]] to <2 x i32>
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; CHECK-NEXT: ret <2 x i32> [[R]]
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;
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%cmp = icmp ugt <2 x i8> %x, %y
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%sel = select <2 x i1> %cmp, <2 x i8> %z, <2 x i8> <i8 42, i8 7>
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%r = sext <2 x i8> %sel to <2 x i32>
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ret <2 x i32> %r
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}
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define i16 @trunc(i32 %x, i32 %y, i32 %z) {
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; CHECK-LABEL: @trunc(
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 42, i32 [[Z:%.*]]
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; CHECK-NEXT: [[R:%.*]] = trunc i32 [[SEL]] to i16
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; CHECK-NEXT: ret i16 [[R]]
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;
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%cmp = icmp ult i32 %x, %y
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%sel = select i1 %cmp, i32 42, i32 %z
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%r = trunc i32 %sel to i16
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ret i16 %r
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}
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define <2 x i32> @trunc_vec(<2 x i64> %x, <2 x i64> %y, <2 x i64> %z) {
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; CHECK-LABEL: @trunc_vec(
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; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i64> [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[CMP]], <2 x i64> [[Z:%.*]], <2 x i64> <i64 42, i64 7>
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; CHECK-NEXT: [[R:%.*]] = trunc <2 x i64> [[SEL]] to <2 x i32>
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; CHECK-NEXT: ret <2 x i32> [[R]]
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;
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%cmp = icmp ugt <2 x i64> %x, %y
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%sel = select <2 x i1> %cmp, <2 x i64> %z, <2 x i64> <i64 42, i64 7>
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%r = trunc <2 x i64> %sel to <2 x i32>
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ret <2 x i32> %r
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}
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define double @fpext(float %x, float %y, float %z) {
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; CHECK-LABEL: @fpext(
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; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq float [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], float 1.700000e+01, float [[Z:%.*]]
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; CHECK-NEXT: [[R:%.*]] = fpext float [[SEL]] to double
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; CHECK-NEXT: ret double [[R]]
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;
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%cmp = fcmp oeq float %x, %y
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%sel = select i1 %cmp, float 17.0, float %z
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%r = fpext float %sel to double
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ret double %r
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}
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define <2 x double> @fpext_vec(<2 x float> %x, <2 x float> %y, <2 x float> %z) {
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; CHECK-LABEL: @fpext_vec(
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; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt <2 x float> [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[CMP]], <2 x float> [[Z:%.*]], <2 x float> <float 4.200000e+01, float -2.000000e+00>
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; CHECK-NEXT: [[R:%.*]] = fpext <2 x float> [[SEL]] to <2 x double>
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; CHECK-NEXT: ret <2 x double> [[R]]
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;
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%cmp = fcmp ugt <2 x float> %x, %y
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%sel = select <2 x i1> %cmp, <2 x float> %z, <2 x float> <float 42.0, float -2.0>
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%r = fpext <2 x float> %sel to <2 x double>
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ret <2 x double> %r
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}
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define float @fptrunc(double %x, double %y, double %z) {
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; CHECK-LABEL: @fptrunc(
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; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], double 4.200000e+01, double [[Z:%.*]]
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; CHECK-NEXT: [[R:%.*]] = fptrunc double [[SEL]] to float
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; CHECK-NEXT: ret float [[R]]
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;
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%cmp = fcmp ult double %x, %y
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%sel = select i1 %cmp, double 42.0, double %z
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%r = fptrunc double %sel to float
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ret float %r
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}
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define <2 x float> @fptrunc_vec(<2 x double> %x, <2 x double> %y, <2 x double> %z) {
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; CHECK-LABEL: @fptrunc_vec(
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; CHECK-NEXT: [[CMP:%.*]] = fcmp oge <2 x double> [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[CMP]], <2 x double> [[Z:%.*]], <2 x double> <double -4.200000e+01, double 1.200000e+01>
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; CHECK-NEXT: [[R:%.*]] = fptrunc <2 x double> [[SEL]] to <2 x float>
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; CHECK-NEXT: ret <2 x float> [[R]]
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;
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%cmp = fcmp oge <2 x double> %x, %y
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%sel = select <2 x i1> %cmp, <2 x double> %z, <2 x double> <double -42.0, double 12.0>
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%r = fptrunc <2 x double> %sel to <2 x float>
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ret <2 x float> %r
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}
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