forked from OSchip/llvm-project
24 lines
1.4 KiB
C
24 lines
1.4 KiB
C
// REQUIRES: arm-registered-target
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// RUN: not %clang_cc1 -triple armv7 -target-feature +neon %s -S -o /dev/null 2>&1 | FileCheck %s
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// rdar://13446483
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typedef __attribute__((neon_vector_type(2))) long long int64x2_t;
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typedef struct int64x2x4_t {
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int64x2_t val[4];
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} int64x2x4_t;
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int64x2x4_t t1(const long long a[]) {
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int64x2x4_t r;
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__asm__("vldm %[a], { %q[r0], %q[r1], %q[r2], %q[r3] }"
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: [r0] "=r"(r.val[0]), // expected-warning {{value size does not match register size specified by the constraint and modifier}}
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[r1] "=r"(r.val[1]), // expected-warning {{value size does not match register size specified by the constraint and modifier}}
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[r2] "=r"(r.val[2]), // expected-warning {{value size does not match register size specified by the constraint and modifier}}
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[r3] "=r"(r.val[3]) // expected-warning {{value size does not match register size specified by the constraint and modifier}}
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: [a] "r"(a));
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return r;
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}
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// We should see all four errors, rather than report a fatal error after the first.
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// CHECK: error: non-trivial scalar-to-vector conversion, possible invalid constraint for vector type
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// CHECK: error: non-trivial scalar-to-vector conversion, possible invalid constraint for vector type
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// CHECK: error: non-trivial scalar-to-vector conversion, possible invalid constraint for vector type
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// CHECK: error: non-trivial scalar-to-vector conversion, possible invalid constraint for vector type
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