forked from OSchip/llvm-project
44 lines
1.6 KiB
TableGen
44 lines
1.6 KiB
TableGen
//===-- SPIRV.td - Describe the SPIR-V Target Machine ------*- tablegen -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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include "llvm/Target/Target.td"
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include "SPIRVRegisterInfo.td"
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include "SPIRVRegisterBanks.td"
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include "SPIRVInstrInfo.td"
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def SPIRVInstrInfo : InstrInfo;
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class Proc<string Name, list<SubtargetFeature> Features>
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: Processor<Name, NoItineraries, Features>;
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def : Proc<"generic", []>;
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def SPIRV10 : SubtargetFeature<"spirv1.0", "SPIRVVersion", "10",
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"Use SPIR-V version 1.0">;
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def SPIRV11 : SubtargetFeature<"spirv1.1", "SPIRVVersion", "11",
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"Use SPIR-V version 1.1">;
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def SPIRV12 : SubtargetFeature<"spirv1.2", "SPIRVVersion", "12",
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"Use SPIR-V version 1.2">;
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def SPIRV13 : SubtargetFeature<"spirv1.3", "SPIRVVersion", "13",
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"Use SPIR-V version 1.3">;
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def SPIRV14 : SubtargetFeature<"spirv1.4", "SPIRVVersion", "14",
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"Use SPIR-V version 1.4">;
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def SPIRV15 : SubtargetFeature<"spirv1.5", "SPIRVVersion", "15",
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"Use SPIR-V version 1.5">;
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def SPIRVInstPrinter : AsmWriter {
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string AsmWriterClassName = "InstPrinter";
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bit isMCAsmWriter = 1;
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}
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def SPIRV : Target {
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let InstructionSet = SPIRVInstrInfo;
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let AssemblyWriters = [SPIRVInstPrinter];
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}
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