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llvm-project/llvm/test/CodeGen
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Simon Pilgrim be9a206883 [X86] Split WriteCvtF2F into F32->F64 and F64->F32 scheduler classes 
BtVer2 - Fixes schedules for (V)CVTPS2PD instructions

A lot of the Intel models still have too many InstRW overrides for these new classes - this needs cleaning up but I wanted to get the classes in first

llvm-svn: 332376
 		2018-05-15 17:36:49 +00:00
..
AArch64 [AArch64] Fix mir test case liveins info. 2018-05-15 16:27:34 +00:00
AMDGPU AMDGPU: Make undef legal for v2i16/v2f16 2018-05-13 10:04:38 +00:00
ARC
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ARM [DAG] propagate FMF for all FPMathOperators 2018-05-15 14:16:24 +00:00
AVR [AVR] Add a regression test for struct return lowering 2018-03-20 11:23:03 +00:00
BPF [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
Generic [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
Hexagon [Hexagon] Remove unused flag from subtarget and (non)corresponding test 2018-05-15 16:13:52 +00:00
Inputs
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Lanai
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MIR [NFC] MIR-Canon: switching to a stable string sorting of instructions. 2018-05-13 06:07:20 +00:00
MSP430
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Mips [mips] Mark select instructions correctly 2018-05-15 16:05:04 +00:00
NVPTX [NVPTX] Added a feature to use short pointers for const/local/shared AS. 2018-05-09 23:46:19 +00:00
Nios2
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PowerPC [DAG] propagate FMF for all FPMathOperators 2018-05-15 14:16:24 +00:00
RISCV [RISCV] Support .option rvc and norvc assembler directives 2018-05-11 17:30:28 +00:00
SPARC [DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N) 2018-05-01 19:26:15 +00:00
SystemZ [SystemZ] Bugfix for MVCLoop CC clobbering. 2018-05-07 10:48:43 +00:00
Thumb Reapply ARM: Do not spill CSR to stack on entry to noreturn functions 2018-04-07 10:57:03 +00:00
Thumb2 MachO: trap unreachable instructions 2018-04-13 22:25:20 +00:00
WebAssembly [WebAsembly] Update default triple in test files to wasm32-unknown-unkown. 2018-05-10 17:49:11 +00:00
WinCFGuard
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WinEH [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
X86 [X86] Split WriteCvtF2F into F32->F64 and F64->F32 scheduler classes 2018-05-15 17:36:49 +00:00
XCore [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00