forked from OSchip/llvm-project
109 lines
5.3 KiB
TableGen
109 lines
5.3 KiB
TableGen
//===------------ AMDILInstrInfo.td - AMDIL Target ------*-tablegen-*------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//==-----------------------------------------------------------------------===//
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//
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// This file describes the AMDIL instructions in TableGen format.
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//
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//===----------------------------------------------------------------------===//
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// AMDIL Instruction Predicate Definitions
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// Predicate that is set to true if the hardware supports double precision
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// divide
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def HasHWDDiv : Predicate<"Subtarget.device()"
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"->getGeneration() > AMDILDeviceInfo::HD4XXX && "
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"Subtarget.device()->usesHardware(AMDILDeviceInfo::DoubleOps)">;
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// Predicate that is set to true if the hardware supports double, but not double
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// precision divide in hardware
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def HasSWDDiv : Predicate<"Subtarget.device()"
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"->getGeneration() == AMDILDeviceInfo::HD4XXX &&"
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"Subtarget.device()->usesHardware(AMDILDeviceInfo::DoubleOps)">;
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// Predicate that is set to true if the hardware support 24bit signed
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// math ops. Otherwise a software expansion to 32bit math ops is used instead.
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def HasHWSign24Bit : Predicate<"Subtarget.device()"
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"->getGeneration() > AMDILDeviceInfo::HD5XXX">;
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// Predicate that is set to true if 64bit operations are supported or not
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def HasHW64Bit : Predicate<"Subtarget.device()"
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"->usesHardware(AMDILDeviceInfo::LongOps)">;
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def HasSW64Bit : Predicate<"Subtarget.device()"
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"->usesSoftware(AMDILDeviceInfo::LongOps)">;
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// Predicate that is set to true if the timer register is supported
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def HasTmrRegister : Predicate<"Subtarget.device()"
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"->isSupported(AMDILDeviceInfo::TmrReg)">;
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// Predicate that is true if we are at least evergreen series
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def HasDeviceIDInst : Predicate<"Subtarget.device()"
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"->getGeneration() >= AMDILDeviceInfo::HD5XXX">;
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// Predicate that is true if we have region address space.
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def hasRegionAS : Predicate<"Subtarget.device()"
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"->usesHardware(AMDILDeviceInfo::RegionMem)">;
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// Predicate that is false if we don't have region address space.
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def noRegionAS : Predicate<"!Subtarget.device()"
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"->isSupported(AMDILDeviceInfo::RegionMem)">;
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// Predicate that is set to true if 64bit Mul is supported in the IL or not
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def HasHW64Mul : Predicate<"Subtarget.calVersion()"
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">= CAL_VERSION_SC_139"
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"&& Subtarget.device()"
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"->getGeneration() >="
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"AMDILDeviceInfo::HD5XXX">;
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def HasSW64Mul : Predicate<"Subtarget.calVersion()"
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"< CAL_VERSION_SC_139">;
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// Predicate that is set to true if 64bit Div/Mod is supported in the IL or not
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def HasHW64DivMod : Predicate<"Subtarget.device()"
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"->usesHardware(AMDILDeviceInfo::HW64BitDivMod)">;
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def HasSW64DivMod : Predicate<"Subtarget.device()"
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"->usesSoftware(AMDILDeviceInfo::HW64BitDivMod)">;
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// Predicate that is set to true if 64bit pointer are used.
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def Has64BitPtr : Predicate<"Subtarget.is64bit()">;
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def Has32BitPtr : Predicate<"!Subtarget.is64bit()">;
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//===--------------------------------------------------------------------===//
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// Custom Operands
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//===--------------------------------------------------------------------===//
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include "AMDILOperands.td"
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//===--------------------------------------------------------------------===//
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// Custom Selection DAG Type Profiles
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//===--------------------------------------------------------------------===//
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include "AMDILProfiles.td"
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//===--------------------------------------------------------------------===//
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// Custom Selection DAG Nodes
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//===--------------------------------------------------------------------===//
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include "AMDILNodes.td"
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//===--------------------------------------------------------------------===//
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// Custom Pattern DAG Nodes
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//===--------------------------------------------------------------------===//
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include "AMDILPatterns.td"
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//===----------------------------------------------------------------------===//
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// Instruction format classes
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//===----------------------------------------------------------------------===//
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include "AMDILFormats.td"
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//===--------------------------------------------------------------------===//
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// Multiclass Instruction formats
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//===--------------------------------------------------------------------===//
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include "AMDILMultiClass.td"
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//===--------------------------------------------------------------------===//
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// Intrinsics support
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//===--------------------------------------------------------------------===//
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include "AMDILIntrinsics.td"
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//===--------------------------------------------------------------------===//
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// Instructions support
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//===--------------------------------------------------------------------===//
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include "AMDILInstructions.td"
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