Thomas Lively 3afc346dd0 [WebAssembly] SIMD min and max ... Summary: Depends on D52324 and D52764. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52325 llvm-svn: 344438		2018-10-13 07:26:10 +00:00
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AArch64	[AARCH64][FIX] Emit data symbol for constant pool data	2018-10-11 14:10:32 +00:00
AMDGPU	AMDGPU: Print all kernel descriptor directives (including the ones with default values)	2018-09-12 20:25:39 +00:00
ARM	[ARM] Emmit data symbol for constant pool data	2018-10-02 14:55:48 +00:00
AVR	[AVR] Redefine the 'SBR' instruction as an alias	2018-09-01 12:22:54 +00:00
AsmParser	[debuginfo] generate debug info with asm+.file	2018-08-28 16:23:39 +00:00
BPF	bpf: New disassembler testcases for 32-bit subregister support	2018-02-23 23:49:35 +00:00
COFF	[COFF] [X86] Don't use llvm_unreachable for unsupported relocation types	2018-10-04 20:43:38 +00:00
Disassembler	[RISCV] Fix disassembling of fence instruction with invalid field	2018-10-11 22:49:13 +00:00
ELF	[lib/MC] - Set SHF_EXCLUDE flag for .dwo sections.	2018-09-22 07:36:20 +00:00
Hexagon	Check for tied operands	2018-08-13 14:01:25 +00:00
Lanai	…
MachO	[MC/Dwarf] Unclamp DWARF linetables format on Darwin.	2018-09-13 13:13:50 +00:00
Mips	[mips] Fix FDE/CFI encoding in case of N32 ABI	2018-10-09 11:29:51 +00:00
PowerPC	[MC] Avoid inlining constant symbols with variants.	2018-09-17 20:34:26 +00:00
RISCV	[RISCV] Fix disassembling of fence instruction with invalid field	2018-10-11 22:49:13 +00:00
Sparc	[Sparc] Add unimp alias	2018-09-27 12:34:53 +00:00
SystemZ	[SystemZ, AsmParser] Enable the mnemonic spell corrector.	2017-07-18 09:17:00 +00:00
WebAssembly	[WebAssembly] SIMD min and max	2018-10-13 07:26:10 +00:00
X86	[X86][Assembler] Allow %eip as a register in 32-bit mode for .cfi directives.	2018-09-06 02:03:14 +00:00