llvm-project/llvm/utils/TableGen
Alex Bradbury d590c85753 [TableGen] Give the option of tolerating duplicate register names
A number of architectures re-use the same register names (e.g. for both 32-bit 
FPRs and 64-bit FPRs). They are currently unable to use the tablegen'erated 
MatchRegisterName and MatchRegisterAltName, as tablegen (when built with 
asserts enabled) will fail.

When the AllowDuplicateRegisterNames in AsmParser is set, duplicated register 
names will be tolerated. A backend can then coerce registers to the desired 
register class by (for instance) implementing validateTargetOperandClass.

At least the in-tree Sparc backend could benefit from this, as does RISC-V 
(single and double precision floating point registers).

Differential Revision: https://reviews.llvm.org/D39845

llvm-svn: 320018
2017-12-07 09:51:55 +00:00
..
AsmMatcherEmitter.cpp [TableGen] Give the option of tolerating duplicate register names 2017-12-07 09:51:55 +00:00
AsmWriterEmitter.cpp [AArch64][TableGen] Skip tied result operands for InstAlias 2017-11-20 14:36:40 +00:00
AsmWriterInst.cpp
AsmWriterInst.h
Attributes.cpp [TableGen] Adapt more places to getValueAsString now returning a StringRef instead of a std::string. 2017-05-31 21:12:46 +00:00
CMakeLists.txt [Docs] Add tablegen backend for target opcode documentation 2017-11-14 15:35:15 +00:00
CTagsEmitter.cpp Revert r318822 "[llvm-tblgen] - Stop using std::string in RecordKeeper." 2017-11-23 06:52:44 +00:00
CallingConvEmitter.cpp [TableGen] Simplify CallingConvEmitter.cpp. NFC. 2017-10-16 14:52:26 +00:00
CodeEmitterGen.cpp [tablegen] Avoid creating a temporary vector in getInstructionCase 2017-07-04 06:16:53 +00:00
CodeGenDAGPatterns.cpp [globalisel][tablegen] Add support for relative AtomicOrderings 2017-11-30 21:05:59 +00:00
CodeGenDAGPatterns.h [globalisel][tablegen] Add support for relative AtomicOrderings 2017-11-30 21:05:59 +00:00
CodeGenHwModes.cpp TableGen support for parameterized register class information 2017-09-14 16:56:21 +00:00
CodeGenHwModes.h TableGen support for parameterized register class information 2017-09-14 16:56:21 +00:00
CodeGenInstruction.cpp [globalisel][tablegen] Generalize pointer-type inference by introducing ptypeN. NFC 2017-11-18 00:16:44 +00:00
CodeGenInstruction.h [globalisel][tablegen] Generalize pointer-type inference by introducing ptypeN. NFC 2017-11-18 00:16:44 +00:00
CodeGenIntrinsics.h TableGen: Add IntrHasSideEffects property for intrinsics 2017-04-28 21:01:46 +00:00
CodeGenMapTable.cpp [TableGen] Use StringRef instead of std::string for CodeGenInstruction namespace. NFC 2017-07-07 06:22:35 +00:00
CodeGenRegisters.cpp [TableGen] Replace InfoByHwMode::getAsString with writeToStream 2017-09-22 18:29:37 +00:00
CodeGenRegisters.h TableGen support for parameterized register class information 2017-09-14 16:56:21 +00:00
CodeGenSchedule.cpp [TableGen] Improve error reporting 2017-11-21 21:33:52 +00:00
CodeGenSchedule.h [TableGen] Improve error reporting 2017-11-21 21:33:52 +00:00
CodeGenTarget.cpp Fix a bunch more layering of CodeGen headers that are in Target 2017-11-17 01:07:10 +00:00
CodeGenTarget.h TableGen support for parameterized register class information 2017-09-14 16:56:21 +00:00
DAGISelEmitter.cpp Allow separation of declarations and definitions in <Target>ISelDAGToDAG.inc 2017-11-10 18:36:04 +00:00
DAGISelMatcher.cpp [TableGen] Range loopify DAGISelMatcher. NFC. 2017-10-16 06:43:54 +00:00
DAGISelMatcher.h Remove `inline` keyword from inline `classof` methods 2017-06-29 19:35:17 +00:00
DAGISelMatcherEmitter.cpp [SelectionDAG] Add a isel matcher op to check the type of node results other than result 0. 2017-11-22 07:11:01 +00:00
DAGISelMatcherGen.cpp TableGen support for parameterized register class information 2017-09-14 16:56:21 +00:00
DAGISelMatcherOpt.cpp [TableGen] Use less stack in DAGISelMatcherOpt 2017-02-06 19:41:44 +00:00
DFAPacketizerEmitter.cpp Fix some Clang-tidy and Include What You Use warnings; other minor fixes (NFC). 2016-11-30 17:48:10 +00:00
DisassemblerEmitter.cpp TableGen: Use StringRef instead of const std::string& in return vals. 2016-12-04 05:48:16 +00:00
FastISelEmitter.cpp Strip trailing whitespace 2017-10-06 15:33:55 +00:00
FixedLenDecoderEmitter.cpp [tablegen] Avoid creating temporary strings 2017-07-05 20:14:54 +00:00
GlobalISelEmitter.cpp Revert r319691: [globalisel][tablegen] Split atomic load/store into separate opcode and enable for AArch64. 2017-12-05 05:52:07 +00:00
InfoByHwMode.cpp [TableGen] Replace InfoByHwMode::getAsString with writeToStream 2017-09-22 18:29:37 +00:00
InfoByHwMode.h [TableGen] Replace InfoByHwMode::getAsString with writeToStream 2017-09-22 18:29:37 +00:00
InstrDocsEmitter.cpp [Docs] Add tablegen backend for target opcode documentation 2017-11-14 15:35:15 +00:00
InstrInfoEmitter.cpp [TableGen] Use StringRef instead of std::string for CodeGenInstruction namespace. NFC 2017-07-07 06:22:35 +00:00
IntrinsicEmitter.cpp Fix typo in emitted attribute name 2017-12-03 00:03:01 +00:00
LLVMBuild.txt
OptParserEmitter.cpp [Bash-autocompletion] Add support for -std= 2017-08-29 02:01:56 +00:00
PseudoLoweringEmitter.cpp TableGen: Use StringInit instead of std::string for DagInit arg names 2016-12-05 06:00:46 +00:00
RegisterBankEmitter.cpp [globalisel][regbank] Warn about MIR ambiguities when register bank/class names clash. 2017-11-01 22:13:05 +00:00
RegisterInfoEmitter.cpp Fix a bunch more layering of CodeGen headers that are in Target 2017-11-17 01:07:10 +00:00
SearchableTableEmitter.cpp [tablegen] Avoid creating temporary strings 2017-07-05 20:14:54 +00:00
SequenceToOffsetTable.h Remove usages of deprecated std::unary_function and std::binary_function. 2017-09-14 18:33:25 +00:00
SubtargetEmitter.cpp [TableGen] Improve error reporting 2017-11-21 21:33:52 +00:00
SubtargetFeatureInfo.cpp Reverting r315590; it did not include changes for llvm-tblgen, which is causing link errors for several people. 2017-10-15 14:32:27 +00:00
SubtargetFeatureInfo.h [globalisel][tablegen] Compute available feature bits correctly. 2017-04-29 17:30:09 +00:00
TableGen.cpp [Docs] Add tablegen backend for target opcode documentation 2017-11-14 15:35:15 +00:00
TableGenBackends.h [Docs] Add tablegen backend for target opcode documentation 2017-11-14 15:35:15 +00:00
Types.cpp [globalisel][tablegen] Import SelectionDAG's rule predicates and support the equivalent in GIRule. 2017-04-21 15:59:56 +00:00
Types.h Check that emitted instructions meet their predicates on all targets except ARM, Mips, and X86. 2016-11-19 13:05:44 +00:00
X86DisassemblerShared.h
X86DisassemblerTables.cpp [X86] Fix disassembler table generation to prevent instructions tagged with 'PS' being inherited into PD/XS/XD attribute entries. 2017-10-23 16:49:26 +00:00
X86DisassemblerTables.h [X86] Fix disassembler table generation to prevent instructions tagged with 'PS' being inherited into PD/XS/XD attribute entries. 2017-10-23 16:49:26 +00:00
X86EVEX2VEXTablesEmitter.cpp [X86] Teach EVEX->VEX pass to turn SHUFI32X4/SHUFF32X4/SHUFI64X/SHUFF64X2 into VPERM2F128/VPERM2I128. 2017-11-04 18:10:03 +00:00
X86FoldTablesEmitter.cpp Fix warnings discovered by rL317076. [-Wunused-private-field] 2017-11-01 13:47:55 +00:00
X86ModRMFilters.cpp
X86ModRMFilters.h fix trivial typos in comments; NFC 2017-07-04 13:09:29 +00:00
X86RecognizableInstr.cpp [X86] Fix disassembler table generation to prevent instructions tagged with 'PS' being inherited into PD/XS/XD attribute entries. 2017-10-23 16:49:26 +00:00
X86RecognizableInstr.h [X86] Fix disassembly of EVEX rounding control and SAE instructions. 2017-10-23 02:26:24 +00:00
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