llvm-project/llvm/test/MC/Disassembler/X86
Craig Topper bf7593ec4a [X86] Print all register forms of x87 fadd/fsub/fdiv/fmul as having two arguments where on is %st.
All of these instructions consume one encoded register and the other register is %st. They either write the result to %st or the encoded register. Previously we printed both arguments when the encoded register was written. And we printed one argument when the result was written to %st. For the stack popping forms the encoded register is always the destination and we didn't print both operands. This was inconsistent with gcc and objdump and just makes the output assembly code harder to read.

This patch changes things to always print both operands making us consistent with gcc and objdump. The parser should still be able to handle the single register forms just as it did before. This also matches the GNU assembler behavior.

llvm-svn: 353061
2019-02-04 17:28:18 +00:00
..
amd3dnow.txt [X86][3DNow!] Add PFRCP reg-reg disassembler test case (PR21168) 2018-02-17 14:58:16 +00:00
avx-512.txt [X86] Properly disassemble gather/scatter instructions where xmm4/ymm4/zmm4 are used as the index. 2018-06-06 19:15:15 +00:00
fp-stack.txt [X86] Print all register forms of x87 fadd/fsub/fdiv/fmul as having two arguments where on is %st. 2019-02-04 17:28:18 +00:00
gather-novsib.txt [X86] Don't allow gather/scatter to disassembler if memory operand does not use a SIB byte. 2017-10-22 04:32:30 +00:00
hex-immediates.txt
intel-syntax-32.txt [X86] Remove 'opaque ptr' from the intel syntax parser and printer. 2018-05-01 04:42:00 +00:00
intel-syntax.txt [X86] Remove 'opaque ptr' from the intel syntax parser and printer. 2018-05-01 04:42:00 +00:00
invalid-EVEX-R2.txt [X86][Disassembler] Make it an error to set EVEX.R' to 0 when modrm.reg encodes a GPR. 2018-06-01 06:11:29 +00:00
invalid-VEX-vvvv-32.txt [X86] Make sure the check for VEX.vvvv being all ones on instructions that don't use it doesn't ignore a bit in 32-bit mode. 2018-06-01 01:23:52 +00:00
invalid-VEX-vvvv.txt
lit.local.cfg
marked-up.txt
missing-sib.txt
moffs.txt
padlock.txt
prefixes-i386.txt Fix for Bug 34475 - LOCK/REP/REPNE prefixes emitted as instruction on their own. 2017-11-03 15:25:13 +00:00
prefixes-x86_64.txt Fix for Bug 34475 - LOCK/REP/REPNE prefixes emitted as instruction on their own. 2017-11-03 15:25:13 +00:00
prefixes.txt [X86][Disassembler] Fix LOCK prefix disassembler support 2018-07-05 23:32:42 +00:00
simple-tests.txt [X86] Add 'l' and 'q' suffixes to the tbm instruction mnemonics. 2018-01-12 06:21:36 +00:00
truncated-input.txt
x86-16.txt [X86] Print all register forms of x87 fadd/fsub/fdiv/fmul as having two arguments where on is %st. 2019-02-04 17:28:18 +00:00
x86-32.txt [X86] Teach the disassembler to use %eiz/%riz instead of NoRegister when the SIB byte is present, but doesn't encode an index register and there was another shorter encoding that would achieve the same result. 2018-06-27 19:03:36 +00:00
x86-64-err.txt [X86] Teach the disassembler that some instructions use VEX.W==0 without a corresponding VEX.W==1 instruction and we shouldn't treat them as if VEX.W is ignored. 2017-10-22 06:18:26 +00:00
x86-64.txt [X86][Disassembler] Add bizarro versions of the MOVSXD instruction that sign extend from a GR32 to GR32 or GR16. 2018-10-02 18:16:19 +00:00