llvm-project/llvm/test/MC/Disassembler
Xing GUO 013e17f50e [ARM][MC] Update one test case in 'test/MC/Disassembler/ARM/invalid-armv7.txt'
Summary:
Instruction `[0xfe 0xf0 0x20 0xe3]` is a valid instruction on ARM-v7, which is `dbg #14`. See: 
https://www.cl.cam.ac.uk/research/srg/han/ACS-P35/zynq/ARMv7-A-R-manual.pdf 
(Page: 377)

```
Encoding A1:
DBG<c> #<option>

|31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16|15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00|
|      cond | 0  0  1  1  0| 0| 1  0| 0  0  0  0| 1  1  1  1| 0  0  0  0| 1  1  1  1|    option |
```

Reviewers: fhahn, efriedma

Reviewed By: efriedma

Subscribers: javed.absar, kristof.beyls, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58873

llvm-svn: 355374
2019-03-05 03:07:56 +00:00
..
AArch64 [AArch64] Add support for Cortex-A76 and Cortex-A76AE 2019-02-25 15:08:27 +00:00
AMDGPU [AMDGPU][MC] Enable lds_direct operand for v_readfirstlane_b32, v_readlane_b32 and v_writelane_b32 2019-03-04 12:48:32 +00:00
ARC [ARC] Prevent InstPrinter from crashing on unknown condition codes. 2018-09-06 19:58:26 +00:00
ARM [ARM][MC] Update one test case in 'test/MC/Disassembler/ARM/invalid-armv7.txt' 2019-03-05 03:07:56 +00:00
Hexagon NFC - Various typo fixes in tests 2018-07-04 13:28:39 +00:00
Lanai
MSP430 [MSP430] Minor fixes/improvements for assembler/disassembler 2019-01-10 22:59:50 +00:00
Mips Fixed typos in tests: s/CEHCK/CHECK/ 2019-02-25 13:12:33 +00:00
PowerPC Complete the SPE instruction set patterns 2018-07-18 04:24:57 +00:00
RISCV [RISCV] Fix test/MC/Disassembler/RISCV/invalid-instruction.txt after rL347988 2018-12-03 10:35:46 +00:00
Sparc [Sparc] Add membar assembler tags 2018-12-13 15:29:12 +00:00
SystemZ [SystemZ] Add support for IBM z14 processor (3/3) 2017-07-17 17:44:20 +00:00
WebAssembly [WebAssembly] Fixed disassembler not knowing about OPERAND_EVENT 2019-02-20 00:55:59 +00:00
X86 [X86] Print all register forms of x87 fadd/fsub/fdiv/fmul as having two arguments where on is %st. 2019-02-04 17:28:18 +00:00
XCore