forked from OSchip/llvm-project
013e17f50e
Summary: Instruction `[0xfe 0xf0 0x20 0xe3]` is a valid instruction on ARM-v7, which is `dbg #14`. See: https://www.cl.cam.ac.uk/research/srg/han/ACS-P35/zynq/ARMv7-A-R-manual.pdf (Page: 377) ``` Encoding A1: DBG<c> #<option> |31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16|15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00| | cond | 0 0 1 1 0| 0| 1 0| 0 0 0 0| 1 1 1 1| 0 0 0 0| 1 1 1 1| option | ``` Reviewers: fhahn, efriedma Reviewed By: efriedma Subscribers: javed.absar, kristof.beyls, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D58873 llvm-svn: 355374 |
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.. | ||
AArch64 | ||
AMDGPU | ||
ARM | ||
AVR | ||
AsmParser | ||
BPF | ||
COFF | ||
Disassembler | ||
ELF | ||
Hexagon | ||
Lanai | ||
MSP430 | ||
MachO | ||
Mips | ||
PowerPC | ||
RISCV | ||
Sparc | ||
SystemZ | ||
WebAssembly | ||
X86 |