forked from OSchip/llvm-project
105 lines
3.6 KiB
C++
105 lines
3.6 KiB
C++
//===-- sanitizer_atomic_clang.h --------------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file is a part of ThreadSanitizer/AddressSanitizer runtime.
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// Not intended for direct inclusion. Include sanitizer_atomic.h.
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//
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//===----------------------------------------------------------------------===//
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#ifndef SANITIZER_ATOMIC_CLANG_H
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#define SANITIZER_ATOMIC_CLANG_H
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#if defined(__i386__) || defined(__x86_64__)
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# include "sanitizer_atomic_clang_x86.h"
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#else
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# include "sanitizer_atomic_clang_other.h"
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#endif
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namespace __sanitizer {
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// We would like to just use compiler builtin atomic operations
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// for loads and stores, but they are mostly broken in clang:
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// - they lead to vastly inefficient code generation
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// (http://llvm.org/bugs/show_bug.cgi?id=17281)
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// - 64-bit atomic operations are not implemented on x86_32
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// (http://llvm.org/bugs/show_bug.cgi?id=15034)
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// - they are not implemented on ARM
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// error: undefined reference to '__atomic_load_4'
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// See http://www.cl.cam.ac.uk/~pes20/cpp/cpp0xmappings.html
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// for mappings of the memory model to different processors.
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inline void atomic_signal_fence(memory_order) {
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__asm__ __volatile__("" ::: "memory");
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}
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inline void atomic_thread_fence(memory_order) {
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__sync_synchronize();
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}
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template<typename T>
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inline typename T::Type atomic_fetch_add(volatile T *a,
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typename T::Type v, memory_order mo) {
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(void)mo;
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DCHECK(!((uptr)a % sizeof(*a)));
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return __sync_fetch_and_add(&a->val_dont_use, v);
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}
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template<typename T>
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inline typename T::Type atomic_fetch_sub(volatile T *a,
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typename T::Type v, memory_order mo) {
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(void)mo;
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DCHECK(!((uptr)a % sizeof(*a)));
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return __sync_fetch_and_add(&a->val_dont_use, -v);
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}
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template<typename T>
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inline typename T::Type atomic_exchange(volatile T *a,
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typename T::Type v, memory_order mo) {
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DCHECK(!((uptr)a % sizeof(*a)));
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if (mo & (memory_order_release | memory_order_acq_rel | memory_order_seq_cst))
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__sync_synchronize();
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v = __sync_lock_test_and_set(&a->val_dont_use, v);
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if (mo == memory_order_seq_cst)
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__sync_synchronize();
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return v;
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}
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template <typename T>
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inline bool atomic_compare_exchange_strong(volatile T *a, typename T::Type *cmp,
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typename T::Type xchg,
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memory_order mo) {
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// Transitioned from __sync_val_compare_and_swap to support targets like
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// SPARC V8 that cannot inline atomic cmpxchg. __atomic_compare_exchange
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// can then be resolved from libatomic. __ATOMIC_SEQ_CST is used to best
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// match the __sync builtin memory order.
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return __atomic_compare_exchange(&a->val_dont_use, cmp, &xchg, false,
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__ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST);
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}
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template<typename T>
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inline bool atomic_compare_exchange_weak(volatile T *a,
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typename T::Type *cmp,
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typename T::Type xchg,
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memory_order mo) {
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return atomic_compare_exchange_strong(a, cmp, xchg, mo);
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}
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} // namespace __sanitizer
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// This include provides explicit template instantiations for atomic_uint64_t
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// on MIPS32, which does not directly support 8 byte atomics. It has to
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// proceed the template definitions above.
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#if defined(_MIPS_SIM) && defined(_ABIO32)
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#include "sanitizer_atomic_clang_mips.h"
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#endif
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#undef ATOMIC_ORDER
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#endif // SANITIZER_ATOMIC_CLANG_H
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