forked from OSchip/llvm-project
77 lines
2.3 KiB
C++
77 lines
2.3 KiB
C++
//===- bolt/Passes/ADRRelaxationPass.cpp ----------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the ADRRelaxationPass class.
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//
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//===----------------------------------------------------------------------===//
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#include "bolt/Passes/ADRRelaxationPass.h"
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#include "bolt/Core/ParallelUtilities.h"
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using namespace llvm;
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namespace opts {
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extern cl::OptionCategory BoltCategory;
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static cl::opt<bool>
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AdrPassOpt("adr-relaxation",
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cl::desc("Replace ARM non-local ADR instructions with ADRP"),
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cl::init(true), cl::cat(BoltCategory), cl::ReallyHidden);
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} // namespace opts
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namespace llvm {
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namespace bolt {
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void ADRRelaxationPass::runOnFunction(BinaryFunction &BF) {
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BinaryContext &BC = BF.getBinaryContext();
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for (BinaryBasicBlock *BB : BF.layout()) {
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for (auto It = BB->begin(); It != BB->end(); ++It) {
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MCInst &Inst = *It;
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if (!BC.MIB->isADR(Inst))
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continue;
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const MCSymbol *Symbol = BC.MIB->getTargetSymbol(Inst);
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if (!Symbol)
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continue;
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if (BF.hasIslandsInfo()) {
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BinaryFunction::IslandInfo &Islands = BF.getIslandInfo();
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if (Islands.Symbols.count(Symbol) || Islands.ProxySymbols.count(Symbol))
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continue;
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}
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BinaryFunction *TargetBF = BC.getFunctionForSymbol(Symbol);
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if (TargetBF && TargetBF == &BF)
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continue;
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MCPhysReg Reg;
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BC.MIB->getADRReg(Inst, Reg);
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int64_t Addend = BC.MIB->getTargetAddend(Inst);
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InstructionListType Addr =
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BC.MIB->materializeAddress(Symbol, BC.Ctx.get(), Reg, Addend);
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It = BB->replaceInstruction(It, Addr);
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}
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}
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}
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void ADRRelaxationPass::runOnFunctions(BinaryContext &BC) {
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if (!opts::AdrPassOpt || !BC.HasRelocations)
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return;
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ParallelUtilities::WorkFuncTy WorkFun = [&](BinaryFunction &BF) {
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runOnFunction(BF);
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};
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ParallelUtilities::runOnEachFunction(
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BC, ParallelUtilities::SchedulingPolicy::SP_TRIVIAL, WorkFun, nullptr,
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"ADRRelaxationPass", /* ForceSequential */ true);
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}
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} // end namespace bolt
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} // end namespace llvm
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