forked from OSchip/llvm-project
81 lines
2.9 KiB
ArmAsm
81 lines
2.9 KiB
ArmAsm
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
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// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
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// RUN: | llvm-objdump -d --mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
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// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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stnt1w z0.s, p0, [z1.s]
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// CHECK-INST: stnt1w { z0.s }, p0, [z1.s]
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// CHECK-ENCODING: [0x20,0x20,0x5f,0xe5]
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// CHECK-ERROR: instruction requires: sve2
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// CHECK-UNKNOWN: 20 20 5f e5 <unknown>
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stnt1w z31.s, p7, [z31.s, xzr]
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// CHECK-INST: stnt1w { z31.s }, p7, [z31.s]
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// CHECK-ENCODING: [0xff,0x3f,0x5f,0xe5]
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// CHECK-ERROR: instruction requires: sve2
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// CHECK-UNKNOWN: ff 3f 5f e5 <unknown>
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stnt1w z31.s, p7, [z31.s, x0]
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// CHECK-INST: stnt1w { z31.s }, p7, [z31.s, x0]
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// CHECK-ENCODING: [0xff,0x3f,0x40,0xe5]
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// CHECK-ERROR: instruction requires: sve2
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// CHECK-UNKNOWN: ff 3f 40 e5 <unknown>
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stnt1w z0.d, p0, [z1.d]
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// CHECK-INST: stnt1w { z0.d }, p0, [z1.d]
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// CHECK-ENCODING: [0x20,0x20,0x1f,0xe5]
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// CHECK-ERROR: instruction requires: sve2
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// CHECK-UNKNOWN: 20 20 1f e5 <unknown>
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stnt1w z31.d, p7, [z31.d, xzr]
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// CHECK-INST: stnt1w { z31.d }, p7, [z31.d]
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// CHECK-ENCODING: [0xff,0x3f,0x1f,0xe5]
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// CHECK-ERROR: instruction requires: sve2
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// CHECK-UNKNOWN: ff 3f 1f e5 <unknown>
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stnt1w z31.d, p7, [z31.d, x0]
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// CHECK-INST: stnt1w { z31.d }, p7, [z31.d, x0]
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// CHECK-ENCODING: [0xff,0x3f,0x00,0xe5]
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// CHECK-ERROR: instruction requires: sve2
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// CHECK-UNKNOWN: ff 3f 00 e5 <unknown>
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stnt1w { z0.s }, p0, [z1.s]
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// CHECK-INST: stnt1w { z0.s }, p0, [z1.s]
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// CHECK-ENCODING: [0x20,0x20,0x5f,0xe5]
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// CHECK-ERROR: instruction requires: sve2
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// CHECK-UNKNOWN: 20 20 5f e5 <unknown>
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stnt1w { z31.s }, p7, [z31.s, xzr]
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// CHECK-INST: stnt1w { z31.s }, p7, [z31.s]
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// CHECK-ENCODING: [0xff,0x3f,0x5f,0xe5]
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// CHECK-ERROR: instruction requires: sve2
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// CHECK-UNKNOWN: ff 3f 5f e5 <unknown>
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stnt1w { z31.s }, p7, [z31.s, x0]
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// CHECK-INST: stnt1w { z31.s }, p7, [z31.s, x0]
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// CHECK-ENCODING: [0xff,0x3f,0x40,0xe5]
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// CHECK-ERROR: instruction requires: sve2
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// CHECK-UNKNOWN: ff 3f 40 e5 <unknown>
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stnt1w { z0.d }, p0, [z1.d]
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// CHECK-INST: stnt1w { z0.d }, p0, [z1.d]
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// CHECK-ENCODING: [0x20,0x20,0x1f,0xe5]
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// CHECK-ERROR: instruction requires: sve2
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// CHECK-UNKNOWN: 20 20 1f e5 <unknown>
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stnt1w { z31.d }, p7, [z31.d, xzr]
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// CHECK-INST: stnt1w { z31.d }, p7, [z31.d]
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// CHECK-ENCODING: [0xff,0x3f,0x1f,0xe5]
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// CHECK-ERROR: instruction requires: sve2
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// CHECK-UNKNOWN: ff 3f 1f e5 <unknown>
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stnt1w { z31.d }, p7, [z31.d, x0]
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// CHECK-INST: stnt1w { z31.d }, p7, [z31.d, x0]
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// CHECK-ENCODING: [0xff,0x3f,0x00,0xe5]
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// CHECK-ERROR: instruction requires: sve2
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// CHECK-UNKNOWN: ff 3f 00 e5 <unknown>
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